Package structure with dummy die

Abstract

A package structure and method for forming the same are provided. The package structure includes a package component, and a dummy die disposed over the package component. The package structure includes a device die adjacent to the dummy die, and a buffer layer formed below the dummy die. The buffer layer has a first surface and an opposite second surface, the first surface is in direct contact with a bottom surface of the dummy die and the second surface is separated from the package component. The package structure includes a package layer surrounding the device die, the dummy die and the buffer layer.

What is claimed is: 
     
         1 . A package structure, comprising:
 a package component ;   a dummy die disposed over the package component;   a device die adjacent to the dummy die;   a buffer layer formed below the dummy die, wherein the buffer layer has a first surface and an opposite second surface, the first surface is in direct contact with a bottom surface of the dummy die and the second surface is separated from the package component; and   a package layer surrounding the device die, the dummy die and the buffer layer.   
     
     
         2 . The package structure as claimed in  claim 1 , wherein the device die comprises a memory die, and the memory die comprises a Static Random Access Memory (SRAM) die or a Dynamic Random Access Memory (DRAM) die. 
     
     
         3 . The package structure as claimed in  claim 1 , further comprising:
 a through via formed adjacent to the device die, wherein a height of the through via is greater than a height of the dummy die.   
     
     
         4 . The package structure as claimed in  claim 1 , wherein the second surface of the buffer layer is in direct contact with the package layer. 
     
     
         5 . The package structure as claimed in  claim 1 , wherein a height of the dummy die is smaller than a height of the device die. 
     
     
         6 . The package structure as claimed in  claim 1 , wherein the package component is electrically connected to the device die. 
     
     
         7 . A package structure, comprising:
 a first package component;   a second package component formed over the first package component;   a first memory die between the first package component and the second package component, wherein the first memory die comprises a first substrate; and   a first dummy die adjacent to the first memory die, wherein a first distance from a bottom surface of the first dummy die to the first package component is larger than a second distance from a bottom surface of the first substrate of the first memory die to the first package component, a top surface of the first dummy die is substantially aligned with a top surface of the first memory die, and the first dummy die is embedded in a package layer.   
     
     
         8 . The package structure as claimed in  claim 7 , wherein the first memory die further comprises a conductive pad, and the conductive pad is closer to the first package component than the first substrate. 
     
     
         9 . The package structure as claimed in  claim 8 , wherein the conductive pad is electrically connected to the first package component. 
     
     
         10 . The package structure as claimed in  claim 7 , further comprising:
 a buffer layer formed on the bottom surface of the first dummy die, and the buffer layer is in direct contact with the package layer.   
     
     
         11 . The package structure as claimed in  claim 7 , further comprising:
 a through via formed adjacent to the first memory die, wherein a top surface of the through via is substantially aligned with the top surface of the first memory die.   
     
     
         12 . The package structure as claimed in  claim 11 , wherein a third distance between a bottom surface of the through via and the first package component is smaller than the second distance. 
     
     
         13 . The package structure as claimed in  claim 7 , wherein the first package component is electrically connected to the second package component. 
     
     
         14 . The package structure as claimed in  claim 7 , further comprising:
 a third package component formed below the first package component.   
     
     
         15 . A package structure, comprising:
 a first package component;   a first device die formed on a top surface of the first package component;   a first dummy die formed on the top surface of the first package component; and   a second device die formed below a bottom surface of the first package component, wherein the second device die is directly below the first dummy die, and a height of the first dummy die is different from a height of the second device die.   
     
     
         16 . The package structure as claimed in  claim 15 , wherein the second device die comprises a conductive pad, and the conductive pad is electrically connected to the first package component. 
     
     
         17 . The package structure as claimed in  claim 15 , further comprising:
 a buffer layer formed on the first dummy die, and the buffer layer is between the first package component and the first dummy die.   
     
     
         18 . The package structure as claimed in  claim 15 , wherein the first device die comprises a memory die, and the memory die comprises a Static Random Access Memory (SRAM) die or a Dynamic Random Access Memory (DRAM) die. 
     
     
         19 . The package structure as claimed in  claim 15 , further comprising:
 a second package component formed over the first device die and the first dummy die, wherein the second package component is electrically connected to the first package component.   
     
     
         20 . The package structure as claimed in  claim 15 , further comprising:
 a third package component formed below the second device die, wherein the third package component is electrically connected to the first package component.