Storage Array Controller Communication Using Multiple Channels

Abstract

Enabling multi-channel communications between controllers in a storage array, including: creating a plurality of logical communications channels between two or more storage array controllers; inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of a second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing, via a predetermined logical communications channel, the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.

What is claimed is: 
     
         1 . A method comprising:
 obtaining, using a direct memory access (DMA) buffer, a memory location for data stored in a first memory of a first storage array controller, the data to be written to a second memory of a second storage array controller; and   writing the data to the second memory using a predetermined logical communications channel of a plurality of logical communications channels between the first storage array controller and the second storage array controller.   
     
     
         2 . The method of  claim 1  further comprising creating the plurality of logical communications channels between the first storage array controller and the second storage array controller, including segmenting a shared memory space into a plurality of memory segments, each memory segment associated with a distinct logical communications channel. 
     
     
         3 . The method of  claim 1  further comprising:
 receiving, by the first storage array controller, a storage request directed to the storage array; and 
 forwarding, from the first storage array controller to the second storage array controller via a predetermined logical communications channel, the storage request. 
 
     
     
         4 . The method of  claim 1  wherein the first storage array controller writes data into memory of the second storage array controller via a first logical communications channel and the second storage array controller writes data into memory of the first storage array controller via a second logical communications channel. 
     
     
         5 . The method of  claim 4  wherein the first storage array controller and the second storage array controller transmit, via a third logical communications channel, system management information that is not associated with a particular storage request that is directed to a storage array that includes the first storage array controller and the second storage array controller. 
     
     
         6 . The method of  claim 1 , further comprising:
 inserting, into the DMA buffer, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller.   
     
     
         7 . The method of  claim 6  wherein inserting the data transfer descriptor into the DMA buffer further comprises inserting the data transfer descriptor into the buffer utilized by a DMA engine of the first storage array controller via virtualization hardware. 
     
     
         8 . A storage array that includes two or more storage array controllers, the storage array including a computer processor and a computer memory, the computer memory including computer program instructions that, when executed by the computer processor, cause the storage array to carry out the steps of:
 obtaining, using a direct memory access (DMA) buffer, a memory location for data stored in a first memory of a first storage array controller, the data to be written to a second memory of a second storage array controller; and   writing the data to the second memory using a predetermined logical communications channel of a plurality of logical communications channels between the first storage array controller and the second storage array controller.   
     
     
         9 . The storage array of  claim 8  wherein creating the plurality of logical communications channels between the first storage array controller and the second storage array controller further comprises segmenting a shared memory space into a plurality of memory segments, each memory segment associated with a distinct logical communications channel. 
     
     
         10 . The storage array of  claim 8  further comprising computer program instructions that, when executed by the computer processor, cause the storage array to carry out the step of:
 receiving, by the first storage array controller, a storage request directed to the storage array; and 
 forwarding, from the first storage array controller to the second storage array controller via a predetermined logical communications channel, the storage request. 
 
     
     
         11 . The storage array of  claim 8  wherein the first storage array controller writes data into memory of the second storage array controller via a first logical communications channel and the second storage array controller writes data into memory of the first storage array controller via a second logical communications channel. 
     
     
         12 . The storage array of  claim 8  wherein the first storage array controller and the second storage array controller transmit, via a third logical communications channel, system management information that is not associated with a particular storage request that is directed to the storage array. 
     
     
         13 . The storage array of  claim 8  further comprising computer program instructions that, when executed by the computer processor, cause the storage array to carry out the step of inserting, into the DMA buffer, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller. 
     
     
         14 . The storage array of  claim 13  further comprising computer program instructions that, when executed by the computer processor, cause the storage array to carry out the step of inserting the data transfer descriptor into the buffer utilized by a DMA engine of the first storage array controller via virtualization hardware. 
     
     
         15 . A computer program product disposed upon a computer readable medium, the computer program product comprising computer program instructions that, when executed, cause a storage array controller to carry out the steps of:
 obtaining, using a direct memory access (DMA) buffer, a memory location for data stored in a first memory of a first storage array controller, the data to be written to a second memory of a second storage array controller; and   writing the data to the second memory using a predetermined logical communications channel of a plurality of logical communications channels between the first storage array controller and the second storage array controller.   
     
     
         16 . The computer program product of  claim 15  wherein the computer program instructions that, when executed, cause a storage array controller to carry out the step of creating the plurality of logical communications channels between the first storage array controller and the second storage array controller, including segmenting a shared memory space into a plurality of memory segments, each memory segment associated with a distinct logical communications channel. 
     
     
         17 . The computer program product of  claim 15  wherein the computer program instructions that, when executed, cause a storage array controller to carry out the step of receiving, by the first storage array controller, a storage request directed to the storage array; and
 forwarding, from the first storage array controller to the second storage array controller via a predetermined logical communications channel, the storage request. 
 
     
     
         18 . The computer program product of  claim 15  wherein the first storage array controller writes data into memory of the second storage array controller via a first logical communications channel and the second storage array controller writes data into memory of the first storage array controller via a second logical communications channel. 
     
     
         19 . The computer program product of  claim 15  wherein the first storage array controller and the second storage array controller transmit, via a third logical communications channel, system management information that is not associated with a particular storage request that is directed to a storage array that includes the first storage array controller and the second storage array controller. 
     
     
         20 . The computer program product of  claim 15  further comprising computer program instructions that, when executed, cause the storage array to carry out the step of inserting, into the DMA buffer, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller.