US2023317598A1PendingUtilityA1
Semiconductor device using one or more slots added to isolation region surrounding inductor for isolation improvement
Est. expiryMar 31, 2042(~15.7 yrs left)· nominal 20-yr term from priority
H10W 44/241H10W 44/20H10W 42/267H10W 42/20H10W 44/501H10W 20/497H10D 1/20H01L 23/5227H01L 23/66H01L 28/10H01L 2223/6672
52
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Claims
Abstract
A semiconductor device includes a metal layer, a ground plane formed on the metal layer, a first inductor formed on the metal layer, and a first isolation region formed on the metal layer and arranged to separate the first inductor from the ground plane. The first isolation region includes a first main area surrounding the first inductor, and at least one first slot extended from the first main area.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device comprising:
a metal layer; a ground plane, formed on the metal layer; a first inductor, formed on the metal layer; and a first isolation region, formed on the metal layer and arranged to separate the first inductor from the ground plane, wherein the first isolation region comprises:
a first main area, surrounding the first inductor; and
at least one first slot, extended from the first main area.
2 . The semiconductor device of claim 1 , further comprising:
a second inductor, formed on the metal layer; wherein the at least one first slot is configured to reduce a coupling coefficient of mutual inductance between the first inductor and the second inductor.
3 . The semiconductor device of claim 2 , wherein a position of the at least one first slot depends on a relative position between the first inductor and the second inductor.
4 . The semiconductor device of claim 2 , wherein a size of the at least one first slot depends on a compensation range of the coupling coefficient.
5 . The semiconductor device of claim 2 , wherein the at least one first slot is configured to make the coupling coefficient equal to a zero value.
6 . The semiconductor device of claim 2 , wherein a size of the at least one first slot is configured by a metal option.
7 . The semiconductor device of claim 2 , wherein a size of the at least one first slot is configured by at least one metal-oxide-semiconductor (MOS) switch.
8 . The semiconductor device of claim 2 , wherein the first inductor is a part of an oscillator, an amplifier, a balun, a transformer, a mixer or a divider.
9 . The semiconductor device of claim 2 , wherein the first inductor is a part of a radio-frequency (RF) chip, and the second inductor is a part of the RF chip.
10 . The semiconductor device of claim 2 , further comprising:
a second isolation region, formed on the metal layer and arranged to separate the second inductor from the ground plane, wherein the second isolation region comprises:
a second main area, surrounding the second inductor; and
at least one second slot, extended from the second main area.
11 . The semiconductor device of claim 10 , wherein the at least one second slot is configured to reduce the coupling coefficient of mutual inductance between the first inductor and the second inductor.
12 . A semiconductor device comprising:
a metal layer; a ground plane, formed on the metal layer; a first inductor, formed on the metal layer; a second inductor, formed on the metal layer; and a first isolation region, formed on the metal layer and arranged to separate the first inductor from the ground plane, wherein a shape of the first isolation region is configured to reduce a coupling coefficient of mutual inductance between the first inductor and the second inductor.
13 . The semiconductor device of claim 12 , wherein the shape of the first isolation region is configured to make the coupling coefficient equal to a zero value.
14 . The semiconductor device of claim 12 , wherein the first inductor is a part of an oscillator, an amplifier, a balun, a transformer, a mixer or a divider.
15 . The semiconductor device of claim 12 , wherein the first inductor is a part of a radio-frequency (RF) chip, and the second inductor is a part of the RF chip.
16 . The semiconductor device of claim 12 , further comprising:
a second isolation region, formed on the metal layer and arranged to separate the second inductor from the ground plane;
wherein a shape of the second isolation region is configured to reduce the coupling coefficient of mutual inductance between the first inductor and the second inductor.Join the waitlist — get patent alerts
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