Structure and method for semiconductor packaging

Abstract

A semiconductor packaging structure includes a die including a bond pad and a first metal layer structure disposed on the die, the first metal layer structure having a first width, the first metal layer structure including a first metal layer, the first metal layer electrically coupled to the bond pad. The semiconductor packaging structure also includes a first photosensitive material around sides of the first metal layer structure and a second metal layer structure disposed over the first metal layer structure and over a portion of the first photosensitive material, the second metal layer structure electrically coupled to the first metal layer structure, the second metal layer structure having a second width, where the second width is greater than the first width. Additionally, the semiconductor packaging structure includes a second photosensitive material around sides of the second metal layer structure.

What is claimed is: 
     
         1 . A semiconductor packaging structure, comprising:
 a die comprising a bond pad;   a mold compound at least partially surrounding the die;   a first metal layer structure disposed on the die, the first metal layer structure comprising a first metal layer, the first metal layer electrically coupled to the bond pad;   a first insulating material around sides of the first metal layer structure;   a second metal layer structure disposed over the first metal layer structure and over a portion of the first insulating material, the second metal layer structure electrically coupled to the first metal layer, wherein at least a portion the second metal layer structure extends beyond an edge of the die over the mold compound; and   a second insulating material around sides of the second metal layer structure.   
     
     
         2 . The semiconductor packaging structure of  claim 1 , wherein the first insulating material and the second insulating material are composed of a photosensitive material. 
     
     
         3 . The semiconductor packaging structure of  claim 2 , wherein the photosensitive material is a permanent photoresist. 
     
     
         4 . The semiconductor packaging structure of  claim 1 , further comprising a seed layer surrounding the first metal layer. 
     
     
         5 . The semiconductor packaging structure of  claim 1 , further comprising:
 a plating layer disposed on the second metal layer structure; and   a seed layer at least partially surrounding the second metal layer structure, wherein the plating layer and the seed layer surround the second metal layer structure.   
     
     
         6 . The semiconductor packaging structure of  claim 5 , wherein the plating layer extends beyond a top surface of the second insulating material. 
     
     
         7 . The semiconductor packaging structure of  claim 1 , wherein the die is a first die, the bond pad is a first bond pad, the semiconductor packaging structure further comprising:
 a second die comprising a second bond pad; and   a second first metal layer structure disposed on the second die, the second first metal layer structure electrically coupling the second bond pad to the second metal layer structure, wherein the second metal layer structure is disposed over at least a portion of the first die and over at least a portion of the second die.   
     
     
         8 . The semiconductor packaging structure of  claim 7 , wherein the mold compound at least partially surrounds the first die and the second die. 
     
     
         9 . A method comprising:
 applying a first insulating material to a semiconductor structure, the semiconductor structure comprising a bond pad;   forming an opening in the first insulating material, exposing at least a portion of the bond pad;   depositing a first seed layer over the first insulating material and on at least a portion of a bottom or a sidewall the opening of the first insulating material;   plating a first metal layer over the first seed layer and in the opening of the first insulating material;   performing chemical-mechanical polishing (CMP) on at least a portion of the first metal layer, the first seed layer, and the first insulating material, to form a first metal layer structure in the opening in the first insulating material;   applying a second insulating material over the first insulating material and over the first metal layer structure;   forming an opening in the second insulating material, exposing at least a portion of the first metal layer structure and at least a portion of the first insulating material;   depositing a second seed layer over the second insulating material and on at least a portion of a bottom or a sidewall of the opening of the second insulating material;   plating a second metal layer over the second seed layer and in the opening of the second insulating material; and   performing CMP on the second metal layer, on the second seed layer, and on the second insulating material, to form a second metal layer structure, in the opening of the second insulating material, the second metal layer structure comprising the second metal layer and the second seed layer.   
     
     
         10 . The method of  claim 9 , wherein applying the first insulating material comprises spin coating the first insulating material on the semiconductor structure, and wherein applying the second insulating material comprises spin coating the second insulating material on the first insulating material and on the first metal layer structure. 
     
     
         11 . The method of  claim 9 , wherein applying the first insulating material comprises laminating the first insulating material on the semiconductor structure, and wherein applying the second insulating material comprises laminating the second insulating material on the first insulating material and on the first metal layer structure. 
     
     
         12 . The method of  claim 9 , wherein forming the opening in the first insulating material comprises performing photolithography on the first insulating material, and wherein forming the opening in the second insulating material comprises performing photolithography on the second insulating material. 
     
     
         13 . The method of  claim 9 , further comprising applying a plate layer to the second metal layer structure, wherein the plate layer extends above a top surface of the second insulating material. 
     
     
         14 . The method of  claim 9 , further comprising applying a back side coat to a surface of the semiconductor structure. 
     
     
         15 . The method of  claim 9 , wherein the semiconductor structure is a die, the method further comprising:
 attaching the die to a carrier;   performing molding on the die, to cover the die, while the die is attached to the carrier; and   removing the carrier, to generate a reconstituted wafer, after performing molding on the die.   
     
     
         16 . The method of  claim 15 , wherein the semiconductor structure comprises a first die, the method further comprising:
 attaching the first die to the carrier; and   attaching a second die to the carrier.   
     
     
         17 . A method comprising:
 applying a first insulating material to a semiconductor structure, the semiconductor structure comprising a bond pad;   pad;   forming an opening in the first insulating material, exposing at least a portion of the bond applying a second insulating material over the first insulating material and on at least a portion of a bottom or a sidewall of the opening of the first insulating material;   forming an opening in the second insulating material extending through at least a portion of the opening of the first insulating material, exposing at least a portion of the bond pad;   depositing a seed layer over the second insulating material, on at least a portion of a bottom or a sidewall of the opening of the second insulating material and of the first insulating material;   plating a metal layer over the seed layer, in the opening of the second insulating material and of the first insulating material; and   performing CMP on at least a portion of the metal layer, on the seed layer, and on the second insulating material, to form a first metal layer structure in the opening of the first insulating material and a second metal layer structure in the opening of the second insulating material.   
     
     
         18 . The method of  claim 17 , further comprising applying a plate layer to the second metal layer structure, wherein the plate layer extends above a top of the second insulating material. 
     
     
         19 . The method of  claim 17 , further comprising applying a back side coat to as side the semiconductor structure opposite a side of the bond pad. 
     
     
         20 . The method of  claim 17 , wherein the semiconductor structure is a die, the method further comprising:
 attaching the die to a carrier;   performing molding on the die, to at least partially cover the die, while the die is attached to the carrier; and   removing the carrier from the die, to generate a reconstituted wafer, after performing molding on the die.