Direct access to a hardware device for virtual machines of a virtualized computer system

Abstract

In a virtualized computer system in which a guest operating system runs on a virtual machine of a virtualized computer system, a computer-implemented method of providing the guest operating system with direct access to a hardware device coupled to the virtualized computer system via a communication interface, the method including: (a) obtaining first configuration register information corresponding to the hardware device, the hardware device connected to the virtualized computer system via the communication interface; (b) creating a passthrough device by copying at least part of the first configuration register information to generate second configuration register information corresponding to the passthrough device; and (c) enabling the guest operating system to directly access the hardware device corresponding to the passthrough device by providing access to the second configuration register information of the passthrough device.

What is claimed is: 
     
         1 . A method executed in a virtualized computer system in which a guest operating system (OS) runs on a virtual machine (VM) of the virtualized computer system that includes at least a processor, a memory, and a hardware device, the method comprising:
 sending, by a guest driver in the guest OS to a direct memory access (DMA) cache, a request for a machine address (MA) corresponding to a guest physical address (GPA);   receiving, by the guest driver in the guest OS from the DMA cache, the MA corresponding to the GPA;   sending, by the guest driver in the guest OS, an input/output (I/O) request to the hardware device directly using the MA; and   receiving, by the guest driver in the guest OS, a DMA completed message from the hardware device.   
     
     
         2 . The method of  claim 1 , wherein the DMA cache is included in the guest OS. 
     
     
         3 . The method of  claim 1 , wherein the guest driver is a modified guest driver to make the I/O request with the MA. 
     
     
         4 . The method of  claim 1 , further comprising:
 upon the MA corresponding to the GPA not being available in the DMA cache, making a call to a hypervisor to provide the MA corresponding to the GPA to the DMA cache.   
     
     
         5 . The method of  claim 4 , further comprising:
 receiving, via the DMA cache, the MA corresponding to the GPA.   
     
     
         6 . The method of  claim 1 , further comprising:
 releasing MA to GPA mapping including the MA and the GPA to the DMA cache.   
     
     
         7 . The method of  claim 1 , wherein the hardware device is a Small Computer System Interface (SCSI) Host Bus Adapter device. 
     
     
         8 . A non-transitory computer readable medium having computer executable instructions that, when executed by a processor, cause the processor to:
 send, by a guest driver in a guest operating system (OS) to a direct memory access (DMA) cache, a request for a machine address (MA) corresponding to a guest physical address (GPA);   receive, by the guest driver in the guest OS from the DMA cache, the MA corresponding to the GPA;   send, by the guest driver in the guest OS, an input/output (I/O) request to a hardware device directly using the MA; and   receive, by the guest driver in the guest OS, a DMA completed message from the hardware device.   
     
     
         9 . The non-transitory computer readable medium of  claim 8 , wherein the DMA cache is included in the guest OS. 
     
     
         10 . The non-transitory computer readable medium of  claim 8 , wherein the guest driver is a modified guest driver to make the I/O request with the MA. 
     
     
         11 . The non-transitory computer readable medium of  claim 8 , wherein the computer executable instructions when executed by the processor, further cause the processor to:
 upon the MA corresponding to the GPA not being available in the DMA cache, make a call to a hypervisor to provide the MA corresponding to the GPA to the DMA cache.   
     
     
         12 . The non-transitory computer readable medium of  claim 11 , wherein the computer executable instructions when executed by the processor, further cause the processor to:
 receive, via the DMA cache, the MA corresponding to the GPA.   
     
     
         13 . The non-transitory computer readable medium of  claim 8 , wherein the computer executable instructions when executed by the processor, further cause the processor to:
 release MA to GPA mapping including the MA and the GPA to the DMA cache.   
     
     
         14 . The non-transitory computer readable medium of  claim 8 , wherein the hardware device is a Small Computer System Interface (SCSI) Host Bus Adapter device. 
     
     
         15 . A virtualized computer system comprising:
 a hardware device;   a memory; and   a processor operationally coupled to the memory and programmed to:
 send, by a guest driver in a guest operating system (OS) to a direct memory access (DMA) cache, a request for a machine address (MA) corresponding to a guest physical address (GPA); 
 receive, by the guest driver in the guest OS from the DMA cache, the MA corresponding to the GPA; 
 send, by the guest driver in the guest OS, an input/output (I/O) request to the hardware device directly using the MA; and 
 receive, by the guest driver in the guest OS, a DMA completed message from the hardware device. 
   
     
     
         16 . The virtualized computer system of  claim 15 , wherein the DMA cache is included in the guest OS. 
     
     
         17 . The virtualized computer system of  claim 15 , wherein the guest driver is a modified guest driver to make the I/O request with the MA. 
     
     
         18 . The virtualized computer system of  claim 15 , wherein the processor is further programmed to:
 upon the MA corresponding to the GPA not being available in the DMA cache, make a call to a hypervisor to provide the MA corresponding to the GPA to the DMA cache.   
     
     
         19 . The virtualized computer system of  claim 18 , wherein the processor is further programmed to:
 receive, via the DMA cache, the MA corresponding to the GPA.   
     
     
         20 . The virtualized computer system of  claim 15 , wherein the processor is further programmed to:
 release MA to GPA mapping including the MA and the GPA to the DMA cache.