US2023269929A1PendingUtilityA1

Semiconductor device and method for fabricating the same

Assignee: SK HYNIX INCPriority: Feb 18, 2022Filed: Oct 26, 2022Published: Aug 24, 2023
Est. expiryFeb 18, 2042(~15.6 yrs left)· nominal 20-yr term from priority
H10B 12/30H10B 12/50H10B 12/0335H01L 27/10805H01L 27/10897G11C 5/063
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Claims

Abstract

A semiconductor device includes: a lower structure; an active layer over the lower structure; a bit line coupled to one side of the active layer and extending vertically from the lower structure; a data storage element coupled to another side of the active layer; a word line disposed adjacent to the active layer and extending in a direction crossing the active layer; and a capping layer disposed between the word line and the data storage element and including a trap-suppressing material in contact with the active layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 a lower structure;   an active layer over the lower structure;   a bit line coupled to one side of the active layer and extending vertically from the lower structure;   a data storage element coupled to another side of the active layer;   a word line disposed adjacent to the active layer and extending in a direction crossing the active layer; and   a capping layer disposed between the word line and the data storage element and including a trap-suppressing material in contact with the active layer.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the trap-suppressing material of the capping layer is in direct contact with the active layer and the word line. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the trap-suppressing material of the capping layer includes a nitrogen-free material. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the trap-suppressing material of the capping layer includes an oxide-based material in direct contact with the active layer. 
     
     
         5 . The semiconductor device of  claim 1 ,
 wherein the capping layer further includes a nitride-based material over the trap-suppressing material, and   wherein the trap-suppressing material is disposed between the nitride-based material and the active layer.   
     
     
         6 . The semiconductor device of  claim 5 ,
 wherein the trap-suppressing material includes silicon oxide, and   wherein the nitride-based material includes silicon nitride.   
     
     
         7 . The semiconductor device of  claim 1 , further comprising:
 a gate dielectric layer on a surface of the active layer.   
     
     
         8 . The semiconductor device of  claim 1 , wherein the active layer includes a monocrystalline silicon, polysilicon or an oxide semiconductor material. 
     
     
         9 . The semiconductor device of  claim 1 , wherein the word line includes double word lines facing each other with the active layer interposed therebetween. 
     
     
         10 . The semiconductor device of  claim 1 , wherein the lower structure includes:
 a substrate; and   a bit line pad disposed over the substrate and coupled to the bit line.   
     
     
         11 . The semiconductor device of  claim 1 , wherein the lower structure includes a peripheral circuit portion. 
     
     
         12 . The semiconductor device of  claim 1 ,
 wherein the active layer includes monocrystalline silicon, and   wherein the trap-suppressing material of the capping layer includes nitrogen-free silicon oxide.   
     
     
         13 . The semiconductor device of  claim 1 , further comprising:
 a bit line-side capping layer disposed between the bit line and the word.   
     
     
         14 . The semiconductor device of  claim 13 , wherein the bit line-side capping layer includes a trap-suppressing capping layer in contact with the active layer and the word line. 
     
     
         15 . The semiconductor device of  claim 14 ,
 wherein the bit line-side capping layer further includes a nitrogen-containing capping layer over the trap-suppressing capping layer, and   wherein the trap-suppressing capping layer is disposed between the nitrogen-containing capping layer and the active layer.   
     
     
         16 . The semiconductor device of  claim 15 , wherein the trap-suppressing capping layer includes silicon oxide. 
     
     
         17 . The semiconductor device of  claim 15 , wherein the nitrogen-containing capping layer includes silicon nitride. 
     
     
         18 . The semiconductor device of  claim 13 ,
 wherein the bit line-side capping layer includes:
 a nitrogen-free capping layer in contact with the active layer and the word line; and 
 a nitrogen-containing capping layer over the nitrogen-free capping layer, and 
   wherein the nitrogen-free capping layer is disposed between the nitrogen-containing capping layer and the active layer.   
     
     
         19 . The semiconductor device of  claim 13 ,
 wherein the active layer includes monocrystalline silicon, and   wherein the trap-suppressing material of the capping layer and the bit line-side capping layer include nitrogen-free silicon oxide.   
     
     
         20 . The semiconductor device of  claim 1 , wherein an interface between the active layer and the capping layer includes a trap-free interface.

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