Semiconductor device and method of forming the same

Abstract

A method for manufacturing a semiconductor device includes forming a source/drain region on a semiconductor fin. The source/drain region is adjacent to a dummy gate. The method further includes forming a first dielectric layer over the source/drain region and the dummy gate. The first dielectric layer has a dielectric constant of 3.5 or less. The first dielectric layer may include boron nitride or silicon dioxide with Si-CH3 bonds.

What is claimed is: 
     
         1 . A method for manufacturing a semiconductor device, the method comprising:
 forming a source/drain region on a semiconductor fin, the source/drain region being adjacent to a dummy gate;   forming a first dielectric layer over the source/drain region and the dummy gate, the first dielectric layer having a dielectric constant of 3.5 or less, the first dielectric layer comprising boron nitride; and   forming an opening by removing the dummy gate.   
     
     
         2 . The method of  claim 1 , wherein forming the first dielectric layer comprises a plasma process using capacitive coupling plasma. 
     
     
         3 . The method of  claim 1 , wherein forming the first dielectric layer comprises a plasma process using inductive coupling plasma. 
     
     
         4 . The method of  claim 1 , wherein forming the first dielectric layer comprises using borazine as a process gas. 
     
     
         5 . The method of  claim 1 , wherein forming the first dielectric layer comprises using boron trichloride and nitrogen as process gases. 
     
     
         6 . The method of  claim 1 , further comprising:
 depositing a gate structure in the opening;   forming a first etch stop layer over the first dielectric layer and the gate structure; and   forming a second dielectric layer over the first etch stop layer.   
     
     
         7 . The method of  claim 6 , further comprising:
 forming a second etch stop layer over the second dielectric layer, wherein the second dielectric layer has a dielectric constant of 3.5 or less, the second etch stop layer being in physical contact with the second dielectric layer; and   forming a third dielectric layer over the second etch stop layer, wherein the third dielectric layer has a dielectric constant of 3.9 or greater, the third dielectric layer being in physical contact with the second etch stop layer.   
     
     
         8 . The method of  claim 6 , further comprising:
 forming a second etch stop layer over the second dielectric layer, wherein the second dielectric layer has a dielectric constant of 3.9 or greater; and   forming a third dielectric layer over the second etch stop layer, wherein the third dielectric layer has a dielectric constant of 3.5 or less.   
     
     
         9 . A method for manufacturing a semiconductor device, the method comprising:
 forming a dummy gate over a semiconductor fin;   forming a source/drain region on the semiconductor fin, the source/drain region being adjacent to the dummy gate;   using diethoxymethylsilane and alpha-Terpinene as precursors to deposit a first dielectric layer over the dummy gate and the source/drain region, the first dielectric layer having a dielectric constant less than 3.5; and   after depositing the first dielectric layer, forming a first opening by removing the dummy gate.   
     
     
         10 . The method of  claim 9 , further comprising:
 depositing a gate structure in the first opening;   forming a second dielectric layer over the gate structure and the first dielectric layer;   forming a second opening through the second dielectric layer and the first dielectric layer to the source/drain region; and   filling the second opening with a source/drain contact.   
     
     
         11 . The method of  claim 10 , wherein the second dielectric layer has a dielectric constant of 3.5 or less. 
     
     
         12 . The method of  claim 10 , wherein the second dielectric layer has a dielectric constant of 3.9 or greater. 
     
     
         13 . The method of  claim 10 , wherein forming the second dielectric layer comprises using diethoxymethylsilane and alpha-Terpinene as precursors. 
     
     
         14 . The method of  claim 10 , wherein forming the second dielectric layer comprises using borazine or boron trichloride as a process gas. 
     
     
         15 . The method of  claim 10 , wherein forming the second opening further comprises removing the second dielectric layer. 
     
     
         16 . The method of  claim 10 , further comprising forming an etch stop layer over the source/drain contact, the second dielectric layer, and the gate structure. 
     
     
         17 . A semiconductor device comprising:
 a fin extending from a substrate;   a gate structure over the fin;   a source/drain region adjacent the gate structure; and   a first dielectric layer over the fin, the first dielectric layer having a dielectric constant of 3.5 or less, the first dielectric layer comprising boron nitride, the first dielectric layer extending below a top surface of the gate structure.   
     
     
         18 . The semiconductor device of  claim 17 , further comprising a second dielectric layer over the first dielectric layer, the gate structure, and the source/drain region, the second dielectric layer having a dielectric constant less than 3.5. 
     
     
         19 . The semiconductor device of  claim 18 , wherein the second dielectric layer has a first density of Si-CH 3  bonds, the second dielectric layer has a second density of Si-O bonds, and a ratio of the first density to the second density is in a range of 50% to 120%. 
     
     
         20 . The semiconductor device of  claim 18 , wherein the second dielectric layer comprises boron nitride.