Method for fabricating a semiconductor device
Abstract
In a method of manufacturing a semiconductor device, initial connection patterns are prepared, initial cutting patterns for cutting the initial connection patterns are prepared, non-functional connection patterns at least from the initial connection patterns are identified, final cutting patterns are prepared from the initial cutting patterns and the non-functional connection patterns, a photo mask is prepared from the final cutting patterns, a photo resist pattern is formed over a target layer by a lithography operation using the photo mask, the target layer is patterned to form openings in the target layer by using the photo resist pattern, and connection layers are formed by filling the openings with a conductive material.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An apparatus for preparing photo mask data, comprising:
a processor; and a non-transitory memory storing a program, wherein the program, when executed by the processor, causes the processor to perform:
obtaining initial connection patterns;
obtaining initial cutting patterns for cutting the initial connection patterns;
identifying non-functional connection patterns at least from the initial connection patterns; and
generating final cutting patterns from the initial cutting patterns and the non-functional connection patterns.
2 . The apparatus of claim 1 , wherein the final cutting patterns are generated by combining the initial cutting patterns and the non-functional connection patterns.
3 . The apparatus of claim 2 , wherein in the combining, widths of the non-functional connection patterns are adjusted and then combined with the initial cutting patterns.
4 . The apparatus of claim 3 , wherein the widths of the non-functional connection patterns are expanded to a minimum width of the initial cutting patterns.
5 . The apparatus of claim 3 , wherein the widths of the non-functional connection patterns are expanded in an amount such that adjacent non-functional connection patterns become one pattern.
6 . The apparatus of claim 1 , wherein the connection layers do not include any pattern that is electrically floating.
7 . The apparatus of claim 1 , wherein the final cutting patterns include one or more opening patterns surrounded by a cutting pattern.
8 . A method of manufacturing a photo mask, the method comprising:
preparing first layout patterns; preparing second layout patterns, which partially overlap the first layout patterns; identifying non-functional patterns in the first layout patterns; preparing final layout patterns by combining the second layout patterns and the non-functional patterns of the first layout patterns using a logical OR operation between the second layout patterns and the non-functional patterns of the first layout patterns; and preparing a photo mask from the final layout patterns.
9 . The method of claim 8 , wherein in the combining, widths of the non-functional patterns of the first layout patterns are adjusted.
10 . The method of claim 9 , wherein the widths of the non-functional patterns of the first layout patterns are expanded to a minimum width of the first layout patterns.
11 . The method of claim 9 , wherein the widths of the non-functional patterns of the first layout patterns are expanded in an amount such that adjacent patterns merge with each other.
12 . The method of claim 11 , wherein the conductive patterns do not include any pattern that is electrically floating.
13 . The method of claim 8 , wherein the first layout patterns cross active region patterns.
14 . The method of claim 8 , wherein the final layout patterns include one or more openings.
15 . A method of manufacturing a photo mask, the method comprising:
preparing initial connection patterns, active region patterns and via hole patterns; preparing initial cutting patterns for cutting the initial connection patterns based on the initial connection patterns, the active region patterns and the via hole patterns; preparing final cutting patterns by combining the initial cutting patterns and part of the initial connection patterns; and preparing a photo mask from the final cutting patterns.
16 . The method of claim 15 , wherein the conductive patterns do not include any pattern that does not function as a part of circuity.
17 . The method of claim 15 , wherein the conductive patterns do not include any pattern that is electrically floating.
18 . The method of claim 15 , wherein the final layout patterns include one or more openings each surrounding one of the via hole pattern.
19 . The method of claim 15 , wherein the final layout patterns include one or more island patterns.
20 . The method of claim 15 , wherein the final layout patterns overlap part of the active region patterns.Join the waitlist — get patent alerts
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