US2023246023A1PendingUtilityA1
Method for fabricating semiconductor device
Assignee: UNITED MICROELECTRONICS CORPPriority: Jan 30, 2019Filed: Apr 10, 2023Published: Aug 3, 2023
Est. expiryJan 30, 2039(~12.5 yrs left)· nominal 20-yr term from priority
Inventors:Zhi Zhou
H10W 20/481H10W 20/2134H10W 20/218H10D 84/83H10D 84/0151H10W 10/181H10P 90/1914H10W 20/43H10W 20/42H10W 20/023H10W 20/20H10D 86/201H10D 88/101H10D 88/01H10D 84/038H10D 88/00H10D 86/01H01L 27/0688H01L 21/76251H01L 21/76898H01L 23/528H01L 23/5226H01L 27/1203
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Claims
Abstract
A method for fabricating a semiconductor device is provided, including following steps. Providing a staked layer of a semiconductor layer, a buried oxide layer and a silicon layer. Forming a silicon-based device layer comprising the silicon layer on the buried oxide layer. Forming a first interconnection layer over the silicon-based device layer. Forming a semiconductor-based device layer comprising the semiconductor layer on the buried oxide layer. Forming a second interconnection layer over the semiconductor-based device layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for fabricating a semiconductor device, comprising:
providing a staked layer of a semiconductor layer, a buried oxide layer and a silicon layer; forming a silicon-based device layer comprising the silicon layer on the buried oxide layer; forming a first interconnection layer over the silicon-based device layer; forming a semiconductor-based device layer comprising the semiconductor layer on the buried oxide layer; and forming a second interconnection layer over the semiconductor-based device layer.
2 . The method of claim 1 , wherein the step of providing the staked layer comprising:
forming the semiconductor layer on a supporting substrate; forming the buried oxide layer on the semiconductor layer; and forming the silicon layer on the buried oxide layer, wherein the supporting substrate is removed to expose the semiconductor layer before the step of forming the semiconductor-based device layer.
3 . The method of claim 2 , wherein the buried oxide layer and the silicon layer form a silicon-on-insulator (SOI) structure.
4 . The method of claim 2 , wherein the buried oxide layer and the semiconductor layer form a semiconductor-on-insulator structure.
5 . The method of claim 2 , wherein the semiconductor-based device layer comprises a semiconductor-based device on the semiconductor layer and the silicon-based device layer comprises a silicon-based device on the silicon layer.
6 . The method of claim 1 , wherein the buried oxide layer has a thickness to mechanically support the semiconductor-based device layer by direct contact.
7 . The method of claim 1 ,
wherein the step of forming the first interconnection layer comprises forming a first route structure and a first inter-layer dielectric layer enclosing the first route structure, wherein the step of forming the second interconnection layer comprises forming a second route structure and a second inter-layer dielectric layer enclosing the second route structure.
8 . The method of claim 1 , further comprising:
forming a third route structure in the buried oxide layer, to electrically connect the first route structure and the second route structure.
9 . The method of claim 8 , wherein the third route structure comprises a via through the buried oxide layer to electrically connect the first route structure and the second route structure.
10 . The method of claim 1 , wherein the semiconductor-based device layer comprises a semiconductor-based device operated in a radio frequency (RF) range.Join the waitlist — get patent alerts
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