US2023245989A1PendingUtilityA1
Printed circuit board and electronic component package including the same
Est. expiryApr 1, 2041(~14.7 yrs left)· nominal 20-yr term from priority
H10W 70/682H10W 72/07339H10W 72/07338H10W 72/931H10W 72/321H10W 72/07352H10W 72/353H10W 72/354H10W 72/325H10W 90/724H10W 72/252H10W 90/734H10W 72/9413H10W 72/884H10W 74/117H10W 70/635H10W 70/614H10W 70/60H10W 20/40H10W 70/685H10P 72/74H10P 72/7424H10W 70/09H10W 70/68H05K 1/111H05K 3/382H05K 1/185H05K 1/0298H01L 24/19H01L 23/5389H01L 23/3128H01L 23/485H01L 24/20H01L 23/49827H01L 2224/73265H01L 2224/04105H05K 1/02H05K 1/145
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Claims
Abstract
A printed circuit board includes: a first insulating layer; a first cavity disposed in one surface of the first insulating layer; a plurality of protrusion portions spaced apart from each other in the first cavity; and a first wiring layer embedded in the one surface of the first insulating layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A printed circuit board comprising:
a first insulating layer; a first wiring layer embedded in one surface side of the first insulating layer, and having one surface exposed to the one surface of the first insulating layer; and a cavity formed in the one surface of the first insulating layer; wherein a roughness of bottom surface of the cavity is greater than a roughness of the one surface of the first wiring layer.
2 . The printed circuit board of claim 1 , wherein a roughness of side surface of the cavity is greater than the roughness of the one surface of the first wiring layer.
3 . The printed circuit board of claim 2 , wherein the roughness of the bottom surface of the cavity is substantially the same as the roughness of the side surface of the cavity.
4 . The printed circuit board of claim 3 , wherein a roughness of the one surface of the first insulating layer is greater than the roughness of the one surface of the first wiring layer.
5 . The printed circuit board of claim 1 , wherein a roughness of other surface of the first wiring layer is greater than the roughness of the one surface of the first wiring layer.
6 . The printed circuit board of claim 1 , further comprising a connection pad disposed on the one surface of the first insulating layer,
wherein the connection pad covers at least a portion of the one surface of the first wiring layer.
7 . The printed circuit board of claim 1 , further comprising:
a second wiring layer disposed on other surface opposing the one surface of the first insulating layer; a first via layer penetrating through at least a portion of the first insulating layer to connect the first wiring layer and the second wiring layer each other; a second insulating layer disposed on the other surface of the first insulating layer, and embedding the second wiring layer in one surface side; a third wiring layer disposed on other surface opposing the one surface of the second insulating layer; and a second via layer penetrating through at least a portion of the second insulating layer to connect the second wiring layer and the third wiring layer each other.
8 . The printed circuit board of claim 7 , further comprising a solder resist layer disposed on the one surface of the first insulating layer and the other surface of the second insulating layer, respectively.Join the waitlist — get patent alerts
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