Systems and methods for energy-efficient data processing

Abstract

An energy-efficient sequencer comprising inline multipliers and adders causes a read source that contains matching values to output an enable signal to enable a data item prior to using a multiplier to multiply the data item with a weight to obtain a product for use in a matrix-multiplication in hardware. A second enable signal causes the output to be written to the data item.

What is claimed is: 
     
         1 . A method for energy-efficient data processing, the method comprising:
 in response to obtaining a read command, identifying, in a memory device, a set of input locations from which to read input data, each of the input locations being associated with an address value for a neuron;   accessing the input data in the set of input locations;   using the input to generate a result; and   writing the result back into the memory device.   
     
     
         2 . The method according to  claim 1 , further comprising associating a set of input data items with the address value for the neuron. 
     
     
         3 . The method according to  claim 1 , wherein two or more locations of the set of input locations are concurrently accessed. 
     
     
         4 . The method according to  claim 1 , wherein the result is associated with the neuron. 
     
     
         5 . The method according to  claim 1 , further wherein the neuron represents a node in a fully connected network. 
     
     
         6 . The method according to  claim 1 , further wherein the memory device comprises summing nodes and multipliers that are embedded in the memory device. 
     
     
         7 . The method according to  claim 1 , further wherein the set of input locations are accessed in a single clock cycle. 
     
     
         8 . The method according to  claim 1 , further comprising a read source that comprises the address value for the neuron, the read source outputs a first enable signal that enables a data item among the set of input data items. 
     
     
         9 . The method according to  claim 8 , further comprising applying the address value to one or more write target inputs that, in response to containing the value, output a second enable signal that causes the result to be written to the data item. 
     
     
         10 . The method according to  claim 8 , further comprising enabling at least one weight item, and multiplying one or more of the enabled data items with enabled weight items to obtain a sum of products. 
     
     
         11 . The method according to  claim 10 , further wherein the result is associated with the sum of products that is associated with the neuron. 
     
     
         12 . The method according to  claim 10 , wherein generating the result further comprises applying the sum of products to an adder to obtain an output. 
     
     
         13 . The method according to  claim 11 , further comprising applying the output to an activation function to obtain the result. 
     
     
         14 . A system for energy-efficient data processing, the system comprising:
 a processor; and   a non-transitory computer-readable medium comprising instructions that, when executed by the processor, cause steps to be performed, the steps comprising:
 in response to obtaining a read command, identifying, in a memory device, a set of input locations from which to read input data, each of the input locations being associated with an address value for a neuron; 
 accessing the input data in the set of input locations; 
 using the input to generate a result; and 
 writing the result back into the memory device. 
   
     
     
         15 . The system according to  claim 14 , wherein the two or more locations of the set of input locations are concurrently accessed. 
     
     
         16 . The system according to  claim 14 , wherein the steps further comprise associating a set of input data items with the address value for the neuron. 
     
     
         17 . The system according to  claim 16 , further comprising a read source that comprises the address value for the neuron, the read source outputs a first enable signal that enables a data item among the set of input data items. 
     
     
         18 . The system according to  claim 17 , further comprising applying the address value to one or more write target inputs that, in response to containing the value, output a second enable signal that causes the result to be written to the data item. 
     
     
         19 . The system according to  claim 17 , further comprising enabling at least one weight item, and multiplying a set of one or more of the enabled set of data items with enabled weight items to obtain a sum of products. 
     
     
         20 . The system according to  claim 19 , further wherein the result is associated with the sum of products that is associated with the neuron.