US2023207566A1PendingUtilityA1
Connections from buried interconnects to device terminals in multiple stacked devices structures
Est. expirySep 30, 2040(~14.2 yrs left)· nominal 20-yr term from priority
H10W 20/481H10W 20/43H10W 20/021H10W 20/20H10W 20/427H10W 20/0698H10D 30/6757H10D 30/014H10D 30/6735H10D 62/121H10D 84/853H10D 84/856H10D 86/01H10D 30/43H10D 84/83H10D 88/00H10D 84/0149H10D 88/01H10D 84/038H10D 86/201H01L 23/528H01L 21/84H01L 21/743H01L 27/1203H01L 23/535
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Claims
Abstract
In vertically stacked device structures, a buried interconnect and bottom contacts can be formed, thereby allowing connections to be made to device terminals from both below and above the stacked device structures. Techniques herein include a structure that enables electrical access to each independent device terminal of multiple devices, stacked on top of each other, without interfering with other devices and the local connections that are needed.
Claims
exact text as granted — not AI-modified1 . A method of forming a semiconductor device, the method comprising:
forming a stack of nano-channels spaced vertically from each other; forming a first interconnect line positioned below the stack of nano-channels; creating a bottom contact that connects to the first interconnect line; forming gate-all-around channels from the stack of nano-channels, wherein the gate-all-around channels form a stack of device tiers having at least three device tiers including a lower device tier, one or more intermediate device tiers stacked vertically over the lower device tier, and an upper device tier stacked vertically over the one or more intermediate device tiers; connecting the first interconnect line to one or more first device terminals from the stack of device tiers using the bottom contact; and connecting a second interconnect line to one or more second device terminals from the stack of device tiers using a top contact, the second interconnect line formed above the stack of device tiers.
2 . The method of claim 1 , wherein the one or more first device terminals is a lower device terminal in the lower device tier.
3 . The method of claim 1 , wherein the one or more first device terminals and the one or more second device terminals is a gate.
4 . The method of claim 1 , wherein the one or more second device terminals is at least one of an upper device terminal in the upper device tier and an intermediate device terminal in the one or more intermediate device tiers.
5 . The method of claim 4 , further comprising, in a case that the one or more second device terminals includes the intermediate device terminal, laterally extending the intermediate device terminal beyond a length of (1) the upper device terminal and (2) any additional intermediate device terminals from the one or more intermediate device tiers located above the intermediateJoin the waitlist — get patent alerts
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