US2023197869A1PendingUtilityA1

Optoelectronic device

Assignee: UNIV OXFORD INNOVATION LTDPriority: Sep 18, 2012Filed: Nov 3, 2022Published: Jun 22, 2023
Est. expirySep 18, 2032(~6.1 yrs left)· nominal 20-yr term from priority
H10K 30/151H01L 31/035272H10K 85/00H01L 31/1884H01L 31/022466Y02E10/549H01L 31/036H10K 30/15H01L 31/0725C23C 14/06H01L 31/1864H10K 71/40H10K 85/50H10K 30/40H10K 30/50H10F 77/16H10F 77/244H10F 77/14H10F 71/138H10F 71/128H10F 10/161H10K 85/1135Y02E10/541Y02E10/547H10K 2102/00Y02E10/542
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Claims

Abstract

The invention provides an optoelectronic device comprising a photoactive region, which photoactive region comprises: an n-type region comprising at least one n-type layer; a p- type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: a layer of a perovskite semiconductor without open porosity. The perovskite semiconductor is generally light-absorbing. In some embodiments, disposed between the n-type region and the p-type region is: (i) a first layer which comprises a scaffold material, which is typically porous, and a perovskite semiconductor, which is typically disposed in pores of the scaffold material; and (ii) a capping layer dis -posed on said first layer, which capping layer is said layer of a perovskite semiconductor without open porosity, wherein the perovskite semiconductor in the capping layer is in contact with the perovskite semiconductor in the first layer. The layer of the perovskite semiconductor without open porosity (which may be said capping layer) typically forms a planar heterojunction with the n-type region or the p-type region. The invention also provides processes for producing such optoelectronic devices which typically involve solution deposition or vapour deposition of the perovskite. In one embodiment, the process is a low temperature process; for instance, the entire process may be performed at a temperature or temperatures not exceeding 150° C.

Claims

exact text as granted — not AI-modified
1 - 105 . (canceled) 
     
     
         106 . A photovoltaic device which is a tandem junction photovoltaic device or a multi junction photovoltaic device, wherein the photovoltaic device comprises a photoactive region which comprises:
 an n-type region comprising at least one n-type layer;   a p-type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: 
 a layer of a perovskite semiconductor without open porosity. 
   
     
     
         107 . A photovoltaic device according to  claim 106  which comprises a first electrode, a second electrode, and, disposed between the first and second electrodes: 
 (i) said photoactive region; and 
 (ii) at least one other photoactive region. 
 
     
     
         108 . A photovoltaic device according to  claim 106  wherein the thickness of the layer of the perovskite semiconductor without open porosity is from 10 nm to 100 µm. 
     
     
         109 . A photovoltaic device according to  claim 106  wherein the thickness of the layer of the perovskite semiconductor without open porosity is from 100 nm to 100 µm. 
     
     
         110 . A photovoltaic device according to  claim 106  wherein the perovskite semiconductor has a three-dimensional crystal structure. 
     
     
         111 . A photovoltaic device according to  claim 106  wherein the layer of the perovskite semiconductor without open porosity forms a first planar heterojunction with the n-type region and a second planar heterojunction with the p-type region. 
     
     
         112 . A photovoltaic device according to  claim 106  wherein the photoactive region comprises:
 said n-type region; 
 said p-type region; and, disposed between the n-type region and the p-type region: 
 (i) a first layer which comprises a porous scaffold material and a perovskite semiconductor disposed in pores of the scaffold material, optionally wherein the scaffold material is a dielectric scaffold material or a charge-transporting scaffold material; and 
 (ii) a capping layer disposed on said first layer, which capping layer is said layer of a perovskite semiconductor without open porosity, 
 wherein the perovskite semiconductor in the capping layer is in contact with the perovskite semiconductor in the first layer. 
 
 
     
     
         113 . A photovoltaic device according to  claim 106  wherein the perovskite semiconductor comprises at least one anion selected from halide anions. 
     
     
         114 . A photovoltaic device according to  claim 113  wherein the perovskite comprises a first cation which is an organic cation, a second cation which is a metal cation, said at least one anion selected from halide anions, and optionally further cations or further anions. 
     
     
         115 . A photovoltaic device according to  claim 114  wherein the first cation is (H 2 N═CH—NH 2 ) +  and the second cation is Pb 2+  or Sn 2+ . 
     
     
         116 . A photovoltaic device according to  claim 107  wherein the at least one other photoactive region comprises at least one layer of a semiconductor material. 
     
     
         117 . A photovoltaic device according to  claim 116  wherein the semiconductor material comprises a layer of crystalline silicon, copper zinc tin sulphide, copper zinc tin selenide, copper zinc tin selenide sulphide, copper indium gallium selenide, copper indium gallium diselenide or copper indium selenide. 
     
     
         118 . A photovoltaic device according to  claim 116  wherein the at least one layer of a semiconductor material comprises a layer of crystalline silicon. 
     
     
         119 . A photovoltaic device according to  claim 116  wherein the semiconductor material comprises a perovskite semiconductor. 
     
     
         120 . A photovoltaic device according to  claim 116  wherein the semiconductor material comprises an organic semiconductor. 
     
     
         121 . A photovoltaic device according to  claim 107  wherein the at least one other photoactive region comprises a crystalline silicon Heterojunction with Intrinsic Thin layer (c-Si HIT) cell. 
     
     
         122 . A photovoltaic device according to  claim 106 , wherein:
 (A) the photovoltaic device comprises the following regions in the following order: 
 I. a first electrode; 
 II. said photoactive region; 
 III. a layer (A) of a p-type semiconductor, optionally p-type amorphous silicon; 
 IV. a first layer of an intrinsic semiconductor, optionally intrinsic amorphous silicon; 
 V. a layer (B) of a p-type semiconductor or a layer (B) of an n-type semiconductor, optionally a layer of p-type crystalline silicon or a layer of n-type crystalline silicon; 
 VI. a second layer of an intrinsic semiconductor, optionally intrinsic amorphous silicon; 
 VII. a layer (C) of an n-type semiconductor, optionally n-type amorphous silicon; and 
 VIII. a second electrode; or 
   (B) the photovoltaic device comprises the following regions in the following order: 
 I. a first electrode; 
 II. said photoactive region; 
 III. a layer of a transparent conducting oxide; 
 IV. a layer (D) of an n-type semiconductor, optionally wherein the n-type semiconductor is a metal oxide or metal chalcogenide; 
 V. a layer of copper zinc tin sulphide, copper zinc tin selenide, copper zinc tin selenide sulphide, copper indium gallium selenide, copper indium gallium diselenide or copper indium selenide; and 
 VI. a second electrode; or 
   (C) the photovoltaic device comprises a first electrode, a second electrode, and, disposed between the first and second electrodes: said photoactive region and at least one other photoactive region, wherein each of the at least one other photoactive regions comprises:
 an n-type region comprising at least one n-type layer; 
 a p-type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: 
 a layer of a perovskite semiconductor without open porosity. 
 
   
     
     
         123 . A process for producing a photovoltaic device which is a tandem junction or multi junction photovoltaic device, wherein the photovoltaic device comprises a photoactive region which comprises: 
 an n-type region comprising at least one n-type layer;   a p-type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: 
 a layer of a perovskite semiconductor without open porosity, which process comprises: 
 (a) providing a first region; 
 (b) disposing a second region on the first region, which second region comprises the layer of a perovskite semiconductor without open porosity; and 
 (c) disposing a third region on the second region, wherein: 
 the first region is said n-type region comprising at least one n-type layer and the third region is said p-type region comprising at least one p-type layer; or 
 the first region is said p-type region comprising at least one p-type layer and the third region is said n-type region comprising at least one n-type layer. 
 
   
     
     
         124 . A process according to  claim 123  which further comprises: 
 (d) disposing a tunnel junction on the third region; 
 (e) disposing a further photoactive region on the tunnel junction, which is the same as or different from the photoactive region defined in claim  18 ; 
 (f) optionally repeating steps (d) and (e); and 
 (g) disposing a second electrode on the further photoactive region disposed in the preceding step. 
 
     
     
         125 . A process according to  claim 124  wherein the further photoactive region comprises at least one layer of a semiconductor material, wherein the at least one layer of a semiconductor material comprises a layer of crystalline silicon, copper zinc tin sulphide, copper zinc tin selenide, copper zinc tin selenide sulphide, copper indium gallium selenide, copper indium gallium diselenide or copper indium selenide, a perovskite semiconductor, or an organic semiconductor.

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