Semiconductor device having a super junction structure and method of manufacturing the same

Abstract

A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a semiconductor substrate;   a blocking layer in an active region including:
 a first pillar of a first conductivity type, 
 a first pillar of a second conductivity type electrically coupled to a source electrode and extending along a vertical direction on the semiconductor substrate between the source electrode and the semiconductor substrate; and 
   a termination region including:
 a second pillar of the first conductivity type, and 
 a second pillar of the second conductivity type, the second pillar of the first conductivity type being disposed between the first pillar of the second conductivity type and the second pillar of the second conductivity type, 
 the second pillar of the first conductivity type having a density profile uniform in a horizontal direction orthogonal to the vertical direction, and the density profile of the first conductivity type varies in the vertical direction. 
   
     
     
         2 . The semiconductor device of  claim 1 , wherein the density profile of the second pillar of the first conductivity type varies in the vertical direction according to a predetermined period. 
     
     
         3 . The semiconductor device of  claim 1 , wherein a high-density portion and a low-density portion in the density profile of the second pillar of the first conductivity type are repeated along the vertical direction. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the second pillar of the first conductivity type has a side surface that contacts a side surface of the second pillar of the second conductivity type, the side surface of the second pillar of the first conductivity type has curves opposite curves of the side surface of the second pillar of the second conductivity type. 
     
     
         5 . The semiconductor device of  claim 1 , further comprising:
 a first conductivity type epi-layer formed on the semiconductor substrate.   
     
     
         6 . The semiconductor device of  claim 1 , wherein the semiconductor substrate includes a high density N-type substrate, the second pillar of the first conductivity type is an N-type pillar, and the second pillar of the second conductivity type is a P-type pillar. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the first pillar of the first conductivity type and the first pillar of the second conductivity type have a horizontal cross-section structure including a striped structure, a circular structure, or a cellular structure. 
     
     
         8 . The semiconductor device of  claim 1 , wherein the termination region further includes:
 a third pillar of the first conductivity type, and   the second pillar of the second conductivity type, the second pillar of the second conductivity type being disposed between the second pillar of the first conductivity type and the third pillar of the first conductivity type   the third pillar of the first conductivity type having a width greater than a width of the second pillar of the first conductivity type.   
     
     
         9 . The semiconductor device of  claim 1 , wherein the first pillar of the second conductivity type is electrically coupled to the source electrode via a well. 
     
     
         10 . The semiconductor device of  claim 9 , wherein the well includes a high-density impurity region. 
     
     
         11 . The semiconductor device of  claim 10 , wherein the well is a first well, the second pillar of the second conductivity type is electrically coupled to the source electrode via a second well, the second well excludes a high-density impurity region. 
     
     
         12 . The semiconductor device of  claim 10 , wherein the well is a first well, the second pillar of the second conductivity type is electrically coupled to the source electrode via a second well, the second well excludes a high-density impurity region. 
     
     
         13 . The semiconductor device of  claim 1 , further comprising:
 a field oxide layer, the second pillar of the second conductivity type is coupled to the field oxide layer via a well.   
     
     
         14 . A semiconductor device, comprising:
 a semiconductor substrate;   a blocking layer in an active region including:
 a first pillar of a first conductivity type, 
 a first pillar of a second conductivity type; and 
   a termination region including:
 a second pillar of the first conductivity type, and 
 a second pillar of the second conductivity type, the second pillar of the first conductivity type being disposed between the first pillar of the second conductivity type and the second pillar of the second conductivity type, 
 the second pillar of the first conductivity type has a side surface with curves opposite curves of a side surface of the second pillar of the second conductivity type. 
   
     
     
         15 . The semiconductor device of  claim 14 , wherein the first pillar of the second conductivity type is electrically coupled to a source electrode and extends along a vertical direction on the semiconductor substrate between the source electrode and the semiconductor substrate. 
     
     
         16 . The semiconductor device of  claim 15 , wherein the second pillar of the first conductivity type has a density profile uniform in a horizontal direction orthogonal to the vertical direction, and the density profile of the first conductivity type varies in the vertical direction 
     
     
         17 . The semiconductor device of  claim 16 , wherein the density profile of the second pillar of the first conductivity type varies in the vertical direction according to a predetermined period. 
     
     
         18 . The semiconductor device of  claim 16 , wherein a high-density portion and a low-density portion in the density profile of the second pillar of the first conductivity type are repeated along the vertical direction. 
     
     
         19 . The semiconductor device of  claim 14 , wherein the second pillar of the first conductivity type has a side surface that contacts a side surface of the second pillar of the second conductivity type. 
     
     
         20 . The semiconductor device of  claim 14 , wherein the termination region further includes:
 a third pillar of the first conductivity type, and   the second pillar of the second conductivity type, the second pillar of the second conductivity type being disposed between the second pillar of the first conductivity type and the third pillar of the first conductivity type   the third pillar of the first conductivity type having a width greater than a width of the second pillar of the first conductivity type.