3d nano sheet with high density 3d metal routing

Abstract

A method of microfabrication includes forming a stack of source/drain (S/D) contact structures over a substrate. The S/D contact structures are vertically separated. Gate contact structures are formed over the substrate and vertically separated. A first opening is formed so that middle portions of the S/D contact structures are removed while end portions of the S/D contact structures are positioned on opposing sides of the first opening. A layer stack is formed within the first opening, and includes channel structures stacked over the substrate, vertically separated and connected to respective end portions of the S/D contact structures. Second openings are formed, each uncovering a respective side surface of the layer stack and a respective side surface of at least one gate contact structure. Gate structures are formed in the second openings so that each gate structure is connected to a respective gate contact structure and a respective channel structure.

What is claimed is: 
     
         1 . A method of fabricating a semiconductor device, the method comprising:
 forming a stack of source/drain (S/D) contact structures over a substrate such that the S/D contact structures are vertically separated from each other by dielectric material;   forming gate contact structures over the substrate, the gate contact structures vertically separated from each other by dielectric material;   forming a first opening in the stack of S/D contact structures so that middle portions of the S/D contact structures are removed while end portions of the S/D contact structures are positioned on opposing sides of the first opening;   forming, within the first opening, a layer stack comprising channel structures that are stacked over the substrate, vertically separated from each other and connected to respective end portions of the S/D contact structures;   forming second openings each of which uncovers a respective side surface of the layer stack and a respective side surface of at least one of the gate contact structures; and   forming gate structures in the second openings so that each of the gate structures is connected to a respective gate contact structure and a respective channel structure of the layer stack.   
     
     
         2 . The method of  claim 1 , wherein the forming the S/D contact structures comprises forming a first S/D contact structure and a second S/D contact structure that is shorter than the first S/D contact structure in a horizontal direction parallel to a working surface of the substrate. 
     
     
         3 . The method of  claim 2 , further comprising forming a vertical conductive structure that is connected to a first end portion of the first S/D contact structure and is spaced apart, in the horizontal direction, from end portions of the second S/D contact structure. 
     
     
         4 . The method of  claim 3 , wherein the first S/D contact structure is formed over the second S/D contact structure. 
     
     
         5 . The method of  claim 4 , further comprising forming buried power rails below the second S/D contact structure, wherein the vertical conductive structure is configured to electrically connect the first end portion of the first S/D contact structure to a respective buried power rail. 
     
     
         6 . The method of  claim 3 , wherein the first S/D contact structure is formed below the second S/D contact structure. 
     
     
         7 . The method of  claim 1 , wherein the forming the S/D contact structures comprises forming a first S/D contact structure and a second S/D contact structure, wherein the first S/D contact structure and the second S/D contact structure are staggered in a horizontal direction parallel to a working surface of the substrate. 
     
     
         8 . The method of  claim 1 , wherein the forming the gate contact structures comprises forming a first gate contact structure and a second gate contact structure that is spaced apart from the first gate contact structure in a horizontal direction parallel to a working surface of the substrate and in a vertical direction perpendicular to the working surface of the substrate. 
     
     
         9 . The method of  claim 8 , further comprising forming a vertical conductive structure that is connected to the first gate contact structure and is spaced apart, in the horizontal direction, from the second gate contact structure. 
     
     
         10 . The method of  claim 1 , wherein the forming the gate structures comprises:
 removing sacrificial layers of the layer stack via the second openings, the sacrificial layers being in direct contact with the channel structures; and   forming the gate structures around the channel structures.   
     
     
         11 . The method of  claim 10 , further comprising forming inner spacers configured to separate the end portions of the S/D contact structures from respective gate structures. 
     
     
         12 . The method of  claim 10 , further comprising forming isolation structures configured to isolate the gate structures from each other and from the substrate. 
     
     
         13 . The method of  claim 10 , further comprising:
 removing sacrificial layers that are in direct contact with one or more first channel structures;   forming a first gate structure around the one or more first channel structures;   removing sacrificial layers that are in direct contact with one or more second channel structures; and   forming a second gate structure around the one or more second channel structures.   
     
     
         14 . The method of  claim 10 , wherein the forming the second openings comprises removing end portions of the gate contact structures. 
     
     
         15 . The method of  claim 1 , wherein the forming the layer stack comprises epitaxially growing a stack of semiconductor layers, including the channel structures, over the substrate. 
     
     
         16 . The method of  claim 1 , wherein the S/D contact structures have different lengths such that, when viewed from a wiring direction perpendicular to a working surface of the substrate, a given S/D contact structure extends beyond another given S/D contact structure. 
     
     
         17 . The method of  claim 1 , wherein the gate contact structures have different lengths such that, when viewed from a wiring direction perpendicular to a working surface of the substrate, a given gate contact structure extends beyond another given gate contact structure. 
     
     
         18 . The method of  claim 1 , wherein the gate contact structures are offset in a direction parallel to a working surface of the substrate such that, when viewed from a wiring direction perpendicular to the working surface of the substrate, a given pair of gate contact structures are separated. 
     
     
         19 . The method of  claim 1 , wherein at least one of the S/D contact structures and at least one of the gate contact structures comprise a same structure having extensions in orthogonal directions. 
     
     
         20 . The method of  claim 1 , wherein the channel structures each include a respective source region, a respective channel region and a respective drain region connected serially in a horizontal direction parallel to a working surface of the substrate.