Monolithic multi-i region diode switches

Abstract

Monolithic multi-throw diode switch structures are described. The monolithic multi-throw diode switches include a hybrid arrangement of diodes with different intrinsic regions. In one example, a method of manufacture of a monolithic multi-throw diode switch includes providing an intrinsic layer on an N-type semiconductor substrate, implanting a first P-type region to a first depth into the intrinsic layer to form a first PIN diode comprising a first effective intrinsic region of a first thickness, implanting a second P-type region to a second depth into the intrinsic layer to form a second PIN diode comprising a second effective intrinsic region of a second thickness, and forming at least one metal layer over the intrinsic layer to electrically couple the first PIN diode to a node between a common port and a first port of the switch.

Therefore, the following is claimed: 
     
         1 . A method of manufacture of a monolithic multi-throw diode switch, comprising:
 providing an intrinsic layer on an N-type semiconductor substrate;   implanting a first P-type region to a first depth into the intrinsic layer to form a first PIN diode comprising a first effective intrinsic region of a first thickness;   implanting a second P-type region to a second depth into the intrinsic layer to form a second PIN diode comprising a second effective intrinsic region of a second thickness; and   forming at least one metal layer over the intrinsic layer to electrically couple the first PIN diode to a node between a common port and a first port of the switch and to electrically couple the second PIN diode to a node between the common port and a second port of the switch.   
     
     
         2 . The method of manufacture according to  claim 1 , wherein the first thickness is greater than the second thickness. 
     
     
         3 . The method of manufacture according to  claim 1 , further comprising forming at least one capacitor and at least one inductor over the intrinsic layer as part of the monolithic multi-throw diode switch. 
     
     
         4 . The method of manufacture according to  claim 1 , wherein:
 the first PIN diode is series-connected in the node between the common port and the first port; and   the second PIN diode is series-connected in the node between the common port and the second port.   
     
     
         5 . The method of manufacture according to  claim 1 , wherein:
 the first PIN diode is shunt-connected from the node between the common port and the first port to ground; and   the second PIN diode is shunt-connected from the node between the common port and the second port to ground.   
     
     
         6 . The method of manufacture according to  claim 1 , wherein:
 the first PIN diode is series-connected in the node between the common port and the first port; and   the second PIN diode is shunt-connected from a cathode of the first PIN diode to ground.   
     
     
         7 . The method of manufacture according to  claim 1 , further comprising:
 forming an insulating layer on the intrinsic layer;   forming a first opening in an insulating layer, wherein implanting the first P-type region comprises implanting the first P-type region through the first opening; and   after implanting the first P-type region, forming a second opening in the insulating layer, wherein implanting the second P-type region comprises implanting the second P-type region through the second opening, wherein   a first width of the first opening is different than a second width of the second opening.   
     
     
         8 . The method of manufacture according to  claim 7 , further comprising forming a third opening in the insulating layer. 
     
     
         9 . The method of manufacture according to  claim 8 , wherein a third width of the third opening is different than the second width of the second opening. 
     
     
         10 . The method of manufacture according to  claim 8 , further comprising implanting a third P-type region through the third opening. 
     
     
         11 . The method of manufacture according to  claim 8 , further comprising implanting a third P-type region through the third opening to a third depth into the intrinsic layer to form a third PIN diode comprising a third effective intrinsic region of a third thickness. 
     
     
         12 . The method of manufacture according to  claim 11 , wherein:
 the first thickness is greater than the second thickness; and   the second thickness is greater than the third thickness.   
     
     
         13 . The method of manufacture according to  claim 11 , wherein:
 the first depth is greater than the second depth; and   the second depth is greater than the third depth.   
     
     
         14 . A method of manufacture of a monolithic multi-throw diode switch, comprising:
 providing an intrinsic layer on an N-type semiconductor substrate;   implanting a first P-type region to a first depth into the intrinsic layer;   implanting a second P-type region to a second depth into the intrinsic layer; and   forming at least one passive circuit element over the intrinsic layer.   
     
     
         15 . The method of manufacture according to  claim 14 , wherein the first depth is greater than the second depth. 
     
     
         16 . The method of manufacture according to  claim 14 , further comprising:
 forming an insulating layer on the intrinsic layer;   forming a first opening in the insulating layer, wherein implanting the first P-type region comprises implanting the first P-type region through the first opening; and   forming a second opening in the insulating layer, wherein implanting the second P-type region comprises implanting the second P-type region through the second opening.   
     
     
         17 . The method of manufacture according to  claim 16 , wherein a first width of the first opening is different than a second width of the second opening. 
     
     
         18 . The method of manufacture according to  claim 16 , further comprising forming a third opening in the insulating layer. 
     
     
         19 . The method of manufacture according to  claim 18 , further comprising implanting a third P-type region through the third opening to a third depth into the intrinsic layer. 
     
     
         20 . The method of manufacture according to  claim 19 , wherein:
 the first depth is greater than the second depth; and   the second depth is greater than the third depth.