Semiconductor structure

Abstract

A semiconductor structure is provided in the present disclosure. The semiconductor structure includes a substrate, a plurality of fins on the substrate, a plurality of isolation structures on the substrate, each formed on a top surface of the substrate between adjacent fins, and a power rail formed in at least one isolation structure of the plurality of isolation structures and further in the substrate, where a top surface of the power rail is lower than a top surface of the plurality of fins.

What is claimed is: 
     
         1 . A semiconductor structure, comprising:
 a substrate;   a plurality of fins, formed on the substrate;   a plurality of isolation structures, each formed on a top surface of the substrate between adjacent fins; and   a power rail, formed in at least one isolation structure of the plurality of isolation structures and further in the substrate, wherein a top surface of the power rail is lower than a top surface of the plurality of fins.   
     
     
         2 . The semiconductor structure according to  claim 1 , further including:
 a metal layer, formed on the power rail.   
     
     
         3 . The semiconductor structure according to  claim 2 , wherein:
 the metal layer is made of a metal material including cobalt, tungsten, copper, ruthenium or platinum, or a combination thereof.   
     
     
         4 . The semiconductor structure according to  claim 1 , wherein:
 a bottom surface of the power rail is lower than the top surface of the substrate.   
     
     
         5 . The semiconductor structure according to  claim 1 , wherein:
 the power rail is made of a material including ruthenium, copper, graphene, or a combination thereof.   
     
     
         6 . The semiconductor structure according to  claim 1 , wherein:
 the power rail is formed through the at least one isolation structure having portions of the at least one isolation structure on sidewalls of the power rail; and   a mask layer is formed on the portions of the at least one isolation structure and on the plurality of fins.   
     
     
         7 . The semiconductor structure according to  claim 6 , wherein:
 the mask layer is made of a material including silicon nitride, aluminum nitride, silicon carbide, or a combination thereof.   
     
     
         8 . The semiconductor structure according to  claim 1 , wherein:
 a remaining portion of the at least one isolation structure of the plurality of isolation structures has a top surface lower than a top surface of another one isolation structure of the plurality of isolation structures.   
     
     
         9 . The semiconductor structure according to  claim 8 , wherein:
 the top surface of the power rail is lower than the top surface of the remaining portion of the at least one isolation structure of the plurality of isolation structures, and higher than a top surface of the substrate.