US2023145240A1PendingUtilityA1
Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
Est. expiryJul 29, 2039(~13 yrs left)· nominal 20-yr term from priority
H10P 14/3466H10P 14/24H10P 14/3602H10P 14/3411H10P 14/271H10P 14/3442H10P 14/2905H10P 14/2925H10P 32/16H10D 30/024H10D 62/151C23C 16/455C23C 16/0209C23C 16/46C23C 16/44C23C 16/22C23C 16/52C23C 16/0227C23C 16/325C23C 16/4583C23C 16/30C23C 16/04H01L 21/02661H01L 21/02609H01L 21/0262H01L 29/66795H01L 21/02576H01L 21/02639H01L 29/0847H01L 21/02532
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Claims
Abstract
A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.
Claims
exact text as granted — not AI-modified1 . An apparatus for forming a device, comprising:
a reaction chamber; a first gas source configured to provide a first gas to the reaction chamber; a second gas source configured to provide a second gas to the reaction chamber; a susceptor configured to hold a semiconductor substrate; and a controller configured to perform operations, including:
cleaning a device on the semiconductor substrate of any oxides, the semiconductor substrate being disposed on the susceptor in the reaction chamber;
stabilizing a temperature of the reaction chamber;
flowing a halide precursor onto the device, the halide precursor comprising at least one of: hydrogen fluoride (HF); hydrogen chloride (HCl); hydrogen bromide (HBr); hydrogen iodide (HI); chlorine (Cl 2 ); fluorine (F 2 ); bromine (Br 2 ); or iodine (I 2 );
flowing a silicon precursor onto the device, the silicon precursor comprising at least one of: silane (SiH 4 ); dichlorosilane (DCS); disilane; or trisilane; and
flowing a dopant precursor onto the device, the dopant precursor comprising at least one of: PCl 3 ; PCl 5 ; PBr 3 ; PBr 5 ; PI 3 ; PI 5 ; AsCl 3 ; AsCl 5 ; AsBr 3 ; AsBr 5 ; AsI 3 ; AsI 5 ; SbCl 3 ; SbCl 5 ; SbBr 3 ; SbBr 5 ; SbI 3 ; SbI 5 ; arsine (AsH 3 ); or phosphine (PH 3 );
wherein the halide precursor prevents deposition onto a dielectric layer disposed on the semiconductor substrate;
wherein the silicon precursor and the dopant precursor react to form a contact layer, wherein the contact layer comprises silicon phosphine (SiP); silicon arsenide (SiAs); silicon antimonide (SiSb), or combinations thereof; and
wherein any of the flowing operations are repeated to form a desired thickness of the contact layer.
2 . The apparatus of claim 1 , further configured to perform the cleaning operation at a temperature between 500° C. and 800° C.
3 . The apparatus of claim 2 , wherein the temperature of the cleaning operation is between 550° C. and 700° C.
4 . The apparatus of claim 3 , wherein the temperature of the cleaning operation is between 600° C. and 650° C.
5 . The apparatus of claim 1 , further configured to perform the stabilizing operation by stabilizing the temperature to a temperature ranging 400° C. and 800° C.
6 . The apparatus of claim 1 , wherein the reaction chamber is configured to have a pressure that ranges between 10 and 200 Torr.
7 . The apparatus of claim 6 , wherein the reaction chamber is configured to have a pressure that ranges between 30 and 100 Torr.
8 . The apparatus of claim 1 , wherein the contact layer formed has a crystallographic orientation of ( 111 ).
9 . The apparatus of claim 1 , further configured to perform the cleaning operation by providing a remote plasma.
10 . The apparatus of claim 1 , wherein the cleaning operation further comprises providing a remote plasma.
11 . The apparatus of claim 1 , wherein the dielectric layer comprises silicon oxide, silicon oxynitride, silicon oxycarbon, or combinations thereof.
12 . The apparatus of claim 1 , wherein the dopant precursor comprises at least one of PCl 3 , PCl 5 , PBr 3 , PBr 5 , PI 3 , PI 5 ; and wherein the contact layer comprises silicon phosphine (SiP).
13 . The apparatus of claim 1 , wherein the dopant precursor comprises at least one of AsCl 3 , AsCl 5 , AsBr 3 , AsBr 5 , AsI 3 , AsI 5 ; and wherein the contact layer comprises silicon arsenide (SiAs).
14 . The apparatus of claim 1 , wherein the dopant precursor comprises at least one of SbCl 3 , SbCl 5 , SbBr 3 , SbBr 5 , SbI 3 , SbI 5 ; and wherein the contact layer comprises silicon antimonide (SiSb).
15 . An apparatus for forming a device, comprising:
a reaction chamber; a first gas source configured to provide a first gas to the reaction chamber; a second gas source configured to provide a second gas to the reaction chamber; a susceptor configured to hold a semiconductor substrate; and a controller configured to perform operations, including:
cleaning a device on the semiconductor substrate of any oxides, the semiconductor substrate being disposed on the susceptor in the reaction chamber;
stabilizing a temperature of the reaction chamber;
flowing a halide precursor onto the device, the halide precursor comprising at least one of: hydrogen fluoride (HF); hydrogen chloride (HCl); hydrogen bromide (HBr);
hydrogen iodide (HI); chlorine (Cl 2 ); fluorine (F 2 ); bromine (Br 2 ); or iodine (I 2 );
flowing a silicon precursor onto the device, the silicon precursor comprising at least one of: silane (SiH 4 ); dichlorosilane (DCS); disilane; or trisilane; and
flowing a dopant precursor onto the device, the dopant precursor comprising at least one of: PCl 3 ; PCl 5 ; PBr 3 ; PBr 5 ; PI 3 ; PI 5 ; AsCl 3 ; AsCl 5 ; AsBr 3 ; AsBr 5 ; AsI 3 ; AsI 5 ; SbCl 3 ; SbCl 5 ; SbBr 3 ; SbBr 5 ; SbI 3 ; SbI 5 ; arsine (AsH 3 ); or phosphine (PH 3 );
wherein the halide precursor prevents deposition onto a dielectric layer disposed on the semiconductor substrate;
wherein the silicon precursor and the dopant precursor react to form a contact layer, wherein the contact layer comprises silicon phosphine (SiP); silicon arsenide (SiAs); silicon antimonide (SiSb), or combinations thereof.
16 . The apparatus of claim 15 , further configured to perform the cleaning step at a temperature between 500° C. and 800° C.
17 . The apparatus of claim 15 , wherein the reaction chamber is configured to have a pressure that ranges between 10 and 200 Torr.
18 . An apparatus for forming a device, comprising:
a reaction chamber; a first gas source configured to provide a first gas to the reaction chamber; a second gas source configured to provide a second gas to the reaction chamber; a susceptor configured to hold a semiconductor substrate on which a device is formed; and a controller configured to perform operations, including:
flowing a halide precursor onto the device, the halide precursor comprising at least one of: hydrogen fluoride (HF); hydrogen chloride (HCl); hydrogen bromide (HBr); hydrogen iodide (HI); chlorine (Cl 2 ); fluorine (F 2 ); bromine (Br 2 ); or iodine (I 2 );
flowing a silicon precursor onto the device, the silicon precursor comprising at least one of: silane (SiH 4 ); dichlorosilane (DCS); disilane; or trisilane; and
flowing a dopant precursor onto the device, the dopant precursor comprising at least one of: PCl 3 ; PCl 5 ; PBr 3 ; PBr 5 ; PI 3 ; PI 5 ; AsCl 3 ; AsCl 5 ; AsBr 3 ; AsBr 5 ; AsI 3 ; AsI 5 ; SbCl 3 ; SbCl 5 ; SbBr 3 ; SbBr 5 ; SbI 3 ; SbI 5 ; arsine (AsH 3 ); or phosphine (PH 3 );
wherein the halide precursor prevents deposition onto a dielectric layer disposed on the semiconductor substrate;
wherein the silicon precursor and the dopant precursor react to form a contact layer, wherein the contact layer comprises silicon phosphine (SiP); silicon arsenide (SiAs); silicon antimonide (SiSb), or combinations thereof.
19 . The apparatus of claim 18 , wherein the dielectric layer comprises silicon oxide, silicon oxynitride, silicon oxycarbon, or combinations thereof.
20 . The apparatus of claim 18 , further configured for one of:
the dopant precursor comprising at least one of PCl 3 , PCl 5 , PBr 3 , PBr 5 , PI 3 , and PI 5 ; and the contact layer comprising silicon phosphine (SiP); or the dopant precursor comprising at least one of AsCl 3 , AsCl 5 , AsBr 3 , AsBr 5 , AsI 3 , and AsI 5 ; and the contact layer comprising silicon arsenide (SiAs).Join the waitlist — get patent alerts
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