Packaging techniques for backside mesh connectivity

Abstract

The embodiments herein are directed to technologies for backside security meshes of semiconductor packages. One package includes a substrate having a first interconnect terminal of a first type and a second interconnect terminal of a second type. The package also includes a first security mesh structure disposed on a first side of an integrated circuit die and a conductive path coupled between the first interconnect terminal and the second interconnect terminal. The first security mesh structure is coupled to the first interconnect terminal and the second interconnect terminal being coupled to a terminal on a second side of the integrated circuit die.

1 . A semiconductor package comprising:
 a substrate;   a first-level interconnect terminal disposed on a first surface of the substrate;   a backside interconnect terminal disposed on the first surface of the substrate, wherein the backside interconnect terminal is coupled to the first-level interconnect terminal through the substrate; and   an integrated circuit comprising:
 a front-side metal mesh; 
 front-side active circuitry coupled to the first-level interconnect terminal; and 
 a backside metal mesh coupled to the backside interconnect terminal. 
   
     
     
         2 . The semiconductor package of  claim 1 , wherein the first-level interconnect terminal is a controlled collapse chip connection (C 4 ) solder bump and the backside interconnect terminal is a wirebond pad. 
     
     
         3 . The semiconductor package of  claim 1 , wherein the first-level interconnect terminal is a copper-pillar bump and the backside interconnect terminal is a wirebond pad. 
     
     
         4 . The semiconductor package of  claim 1 , wherein the integrated circuit comprises
 a physically unclonable function circuit coupled to both the front-side metal mesh and the backside metal mesh to output a first fingerprint value, wherein a modification of an electrical characteristic of at least one of the backside metal mesh or the front-side metal mesh causes the physically unclonable function circuit to output a second fingerprint value that is not equal to the first fingerprint value.   
     
     
         5 . The semiconductor package of  claim 4 , wherein the integrated circuit comprises a key generation circuit coupled to the physically unclonable function circuit, the key generation circuit to derive a key for a cryptographic function at least in part on the first fingerprint value. 
     
     
         6 . The semiconductor package of  claim 4 , wherein the integrated circuit comprises a cryptographic circuit coupled to the physically unclonable function circuit, the physically unclonable function circuit to disable the cryptographic circuit when the second fingerprint value is not equal to the first fingerprint value. 
     
     
         7 . The semiconductor package of  claim 1 , wherein the front-side active circuitry is coupled to the front-side metal mesh and the backside metal mesh, wherein the front-side active circuitry is to check electrical continuity of at least one of the front-side metal mesh or the backside metal mesh. 
     
     
         8 . A semiconductor package comprising:
 a substrate;   a first interconnect terminal disposed on a first surface of the substrate;   a second interconnect terminal disposed on the first surface of the substrate, wherein the second interconnect terminal is coupled to the first interconnect terminal through the substrate; and   an integrated circuit comprising:
 a front-side metal mesh; 
 front-side active circuitry coupled to the first interconnect terminal; and 
 a backside metal mesh coupled to the second interconnect terminal. 
   
     
     
         9 . The semiconductor package of  claim 8 , wherein the first interconnect terminal is a controlled collapse chip connection (C 4 ) solder bump and the second interconnect terminal is a wirebond pad. 
     
     
         10 . The semiconductor package of  claim 8 , wherein the first interconnect terminal is a copper-pillar bump and the second interconnect terminal is a wirebond pad. 
     
     
         11 . The semiconductor package of  claim 8 , wherein the integrated circuit comprises
 a physically unclonable function circuit coupled to both the front-side metal mesh and the backside metal mesh to output a first fingerprint value, wherein a modification of an electrical characteristic of at least one of the backside metal mesh or the front-side metal mesh causes the physically unclonable function circuit to output a second fingerprint value that is not equal to the first fingerprint value.   
     
     
         12 . The semiconductor package of  claim 11 , wherein the integrated circuit comprises a key generation circuit coupled to the physically unclonable function circuit, the key generation circuit to derive a key for a cryptographic function at least in part on the first fingerprint value. 
     
     
         13 . The semiconductor package of  claim 11 , wherein the integrated circuit comprises a cryptographic circuit coupled to the physically unclonable function circuit, the physically unclonable function circuit to disable the cryptographic circuit when the second fingerprint value is not equal to the first fingerprint value. 
     
     
         14 . A semiconductor package comprising:
 a substrate;   a first terminal disposed on a first surface of the substrate, the first terminal being a first type;   a second terminal disposed on the first surface of the substrate, the second terminal being a second type different than the first type, wherein the second terminal is coupled to the first terminal through the substrate; and   an integrated circuit comprising:
 a first metal mesh; 
 active circuitry coupled to the first terminal; and 
 a second metal mesh coupled to the second terminal. 
   
     
     
         15 . The semiconductor package of  claim 14 , wherein the first terminal is a controlled collapse chip connection (C 4 ) solder bump and the second terminal is a wirebond pad. 
     
     
         16 . The semiconductor package of  claim 14 , wherein the first terminal is a copper-pillar bump and the second terminal is a wirebond pad. 
     
     
         17 . The semiconductor package of  claim 14 , wherein the integrated circuit comprises
 a physically unclonable function circuit coupled to both the first metal mesh and the second metal mesh to output a first fingerprint value, wherein a modification of an electrical characteristic of at least one of the second metal mesh or the first metal mesh causes the physically unclonable function circuit to output a second fingerprint value that is not equal to the first fingerprint value.   
     
     
         18 . The semiconductor package of  claim 17 , wherein the integrated circuit comprises a key generation circuit coupled to the physically unclonable function circuit, the key generation circuit to derive a key for a cryptographic function at least in part on the first fingerprint value. 
     
     
         19 . The semiconductor package of  claim 17 , wherein the integrated circuit comprises a cryptographic circuit coupled to the physically unclonable function circuit, the physically unclonable function circuit to disable the cryptographic circuit when the second fingerprint value is not equal to the first fingerprint value. 
     
     
         20 . The semiconductor package of  claim 17 . wherein the active circuitry is coupled to the first metal mesh and the second metal mesh, wherein the active circuitry is to check electrical continuity of at least one of the first metal mesh or the second metal mesh.