US2023103943A1PendingUtilityA1

Transmission electron microscope in-situ chip and preparation method thereof

Assignee: XIAMEN CHIP NOVA TECH CO LTDPriority: Mar 12, 2020Filed: Aug 26, 2020Published: Apr 6, 2023
Est. expiryMar 12, 2040(~13.6 yrs left)· nominal 20-yr term from priority
Inventors:Honggang Liao
H10P 95/00H01J 37/261H05B 2203/002H01J 2237/2065H05B 3/265H05B 3/12G01N 23/2251H01J 37/263H01J 37/04H01J 2237/2003H01J 37/20G01N 23/2204H01J 37/26H05B 2203/022H01J 2237/2002H05B 3/06H10N 10/81H05B 2203/014H05B 3/20
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Claims

Abstract

The present disclosure discloses a transmission electron microscope in-situ chip and a preparation method thereof. The transmission electron microscope in-situ chip includes a transmission electron microscope high-resolution in-situ gas phase heating chip, a transmission electron microscope high-resolution in-situ liquid phase heating chip and a transmission electron microscope in-situ electrothermal coupling chip. The transmission electron microscope high-resolution in-situ gas phase heating chip and the transmission electron microscope high-resolution in-situ liquid phase heating chip are respectively suitable for gas samples and liquid samples, and the transmission electron microscope in-situ electrothermal coupling chip realizes the multi-functional embodiment of electrothermal coupling. The three transmission electron microscope in-situ chips have the advantages of high resolution and low sample drift rate.

Claims

exact text as granted — not AI-modified
1 . A transmission electron microscope in-situ gas phase heating chip, structurally comprising a top chip and a bottom chip combined via a metal bonding layer, the top chip and the bottom chip each comprising a front side and a back side, the front side of the top chip being directly bonded to the front side of the bottom chip via the metal bonding layer to be self-sealed to form chamber, and the top chip and the bottom chip being each made of a silicon substrate with silicon nitride or silicon oxide on two sides, wherein
 the top chip is provided with two sample injection ports and a first central window, the first central window is located in a center of the top chip, and the two sample injection ports are symmetrically disposed with respect to the first central window;   the bottom chip is provided with a gas inlet, a gas outlet, a support layer, a heating layer, an insulating layer, a hole and a second central window; the heating layer is provided with four contact electrodes and a spiral annular heating wire, the spiral annular heating wire is in a symmetrical shape, inner coils of the spiral annular heating wire are spaced apart and disconnected from each other, and the four contact electrodes are disposed at an edge of the transmission electron microscope in-situ gas phase heating chip; in a region with the second central window as a center and being larger than an outer edge of the spiral annular heating wire, the hole is reserved by completely etching silicon, the support layer covers the hole, and the support layer is suspended on the silicon substrate with the hole; the spiral annular heating wire in a center of the heating layer is disposed at a position, above the hole, of the support layer and is not in direct contact with the silicon substrate; the gas inlet and the gas outlet are disposed symmetrically with respect to the second central window; the second central window is located in the center of the heating layer and is not shielded by a heating material; and   an area of the top chip smaller than an area of the bottom chip, the first central windows of the top chip and the second central window of the bottom chip are aligned, and a plurality of pores are provided in the first central window and the second central window.   
     
     
         2 . The transmission electron microscope in-situ gas phase heating chip according to  claim 1 , wherein an external dimension of the bottom chip is 2 mm*2 mm-10 mm*10 mm. 
     
     
         3 . (canceled) 
     
     
         4 . The transmission electron microscope in-situ gas phase heating chip according to  claim 1 , wherein the hole is circular or square. 
     
     
         5 . The transmission electron microscope in-situ gas phase heating chip according to  claim 1 , wherein the heating layer is set as two equivalent circuits, and the two equivalent circuits are controlled by separate current source meters and voltage source meters; one of the two equivalent circuits is used for supplying power to produce heat, and a second of the two equivalent circuits is used for monitoring a resistance value of the spiral annular heating wire after heating in real time; and
 the spiral annular heating wire is made of metallic gold, platinum, palladium, rhodium, molybdenum, tungsten, platinum-rhodium alloy or non-metallic molybdenum carbide.   
     
     
         6 . The transmission electron microscope in-situ gas phase heating chip according to  claim 1 , wherein a size of the gas inlet or the gas outlet is determined by allowing etching to end until the front side of the silicon substrate of the bottom chip is exposed such that a reserved film window in the silicon nitride or the silicon oxide on the front side of the silicon substrate is not greater than 500 μm*500 μm and not smaller than 200 μm*200 μm. 
     
     
         7 .- 27 . (canceled) 
     
     
         28 . The transmission electron microscope in-situ gas phase heating chip according to  claim 1 , wherein a thickness of the metal bonding layer is 50 nm-2000 nm, and the metal bonding layer is made of a metal having a melting point less than 1100° C. 
     
     
         29 . The transmission electron microscope in-situ gas phase heating chip according to  claim 1 , wherein the metal bonding layer is made of In, Sn or Al. 
     
     
         30 . The transmission electron microscope in-situ gas phase heating chip according to  claim 1 , wherein the first central window and the second central window are square central windows. 
     
     
         31 . The transmission electron microscope in-situ gas phase heating chip according to  claim 1 , wherein a size of each of the plurality of pores is 0.5 μm-5 μm.

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