Semiconductor device and method for fabricating the same

Abstract

A semiconductor device includes: an alternating stack of conductive layers and dielectric layers disposed over a substrate; a channel layer disposed in a through portion, penetrating through the alternating stack; a blocking layer disposed in the through portion, surrounding an outer wall of the channel layer; and a continuous etch stop layer disposed in the through portion, surrounding an outer wall of the blocking layer.

What is claimed is: 
     
         1 . A method for fabricating a semiconductor device, comprising:
 forming an alternating stack of sacrificial layers and dielectric layers over a substrate;   forming a first through portion, penetrating through the alternating stack;   forming an etch stop layer to cover a sidewall of the first through portion;   forming a blocking layer disposed in the first through portion over the etch stop layer;   forming a second through portion by etching a portion of the alternating stack;   removing the sacrificial layers through the second through portion to form air gaps between the dielectric layers; and   forming conductive layers in the air gaps,   wherein the conductive layers are in contact with the etch stop layer while filling the air gaps.   
     
     
         2 . The method of  claim 1 , wherein the etch stop layer fully covers the sidewall of the first through portion, extending substantially vertically in a direction in which the alternating stack is stacked. 
     
     
         3 . The method of  claim 1 , wherein the etch stop layer includes a material having an etching selectivity with respect to the sacrificial layers. 
     
     
         4 . The method of  claim 1 , wherein the etch stop layer includes SiCO, and the sacrificial layers include silicon nitride. 
     
     
         5 . The method of  claim 1 , wherein the blocking layer includes aluminum oxide, and the etch stop layer includes SiCO. 
     
     
         6 . The method of  claim 1 , further comprising:
 converting the etch stop layer, exposed by the air gap, before the forming of the conductive layers.   
     
     
         7 . The method of  claim 6 , wherein the converting of the etch stop layer, exposed by the air gap, includes a plasma treatment or a thermal treatment. 
     
     
         8 . The method of  claim 1 , wherein the etch stop layer is formed of a single layer of a carbon-containing material. 
     
     
         9 . The method of  claim 1 , wherein the forming the blocking layer disposed in the first through portion over the etch stop layer comprises:
 a first blocking layer over the etch stop layer; and   a second blocking layer over the first blocking layer.   
     
     
         10 . The method of  claim 9 , wherein the first blocking layer includes a metal oxide, and the second blocking layer includes a silicon oxide. 
     
     
         11 . The method of  claim 9 , wherein the first blocking layer includes aluminum oxide, and the etch stop layer includes SiCO. 
     
     
         12 . The method of  claim 9 , wherein the etch stop layer is thinner than the first blocking layer. 
     
     
         13 . The method of  claim 1 , further comprising:
 forming a charge trapping layer over the blocking layer;   forming a tunnel dielectric layer over the charge trapping layer; and   forming a channel layer over tunnel dielectric layer.   
     
     
         14 . The method of  claim 1 , wherein the removing the sacrificial layers through the second through portion to form the air gaps between the dielectric layers comprises:
 removing the sacrificial layers to expose the etch stop layer.