Semiconductor device structure with conductive contacts of different widths and method for preparing the same

Abstract

The present disclosure provides a semiconductor device structure with conductive contact of different widths and a method for preparing the semiconductor device structure. The semiconductor device structure includes a dielectric layer disposed over a semiconductor substrate, and a first conductive contact penetrating through the dielectric layer. The first conductive contact includes a first metal filling layer and a first metal silicide structure surrounding the first metal filling layer. The semiconductor device structure also includes a second conductive contact penetrating through the dielectric layer. The second conductive contact includes a second metal filling layer and a second metal silicide structure surrounding the second metal filling layer, and a first width of the first conductive contact is different from a second width of the second conductive contact.

What is claimed is: 
     
         1 . A semiconductor device structure, comprising:
 a dielectric layer disposed over a semiconductor substrate;   a first conductive contact penetrating through the dielectric layer, wherein the first conductive contact comprises a first metal filling layer and a first metal silicide structure surrounding the first metal filling layer; and   a second conductive contact penetrating through the dielectric layer, wherein the second conductive contact comprises a second metal filling layer and a second metal silicide structure surrounding the second metal filling layer, and wherein a first width of the first conductive contact is different from a second width of the second conductive contact.   
     
     
         2 . The semiconductor device structure of  claim 1 , wherein the first metal filling layer is separated from the dielectric layer by the first metal silicide structure, and the second metal filling layer is separated from the dielectric layer by the second metal silicide structure. 
     
     
         3 . The semiconductor device structure of  claim 1 , wherein the first metal filling layer is separated from the semiconductor substrate by the first metal silicide structure, and the second metal filling layer is separated from the semiconductor substrate by the second metal silicide structure. 
     
     
         4 . The semiconductor device structure of  claim 1 , wherein a material of the first metal silicide structure is the same as a material of the second metal silicide structure. 
     
     
         5 . The semiconductor device structure of  claim 1 , wherein a top surface of the first metal silicide structure is level with a top surface of the first metal filling layer, and a top surface of the second metal silicide structure is level with a top surface of the second metal filling layer. 
     
     
         6 . The semiconductor device structure of  claim 1 , wherein the first metal silicide structure and the second metal silicide structure each comprise multiple sub-layers. 
     
     
         7 . A method for preparing a semiconductor device structure, comprising:
 forming a dielectric layer over a semiconductor substrate;   forming a first opening and a second opening penetrating through the dielectric layer, wherein a first width of the first opening is different from a second width of the second opening;   forming a first metal silicide structure and a second metal silicide structure in the first opening and the second opening, respectively, wherein the forming the first metal silicide structure and the second metal silicide structure comprises:
 forming a first silicon-containing layer and a second silicon-containing layer lining the first opening and the second opening, respectively; and 
 transforming the first silicon-containing layer and the second silicon-containing layer into a first metal silicide layer and a second metal silicide layer, respectively; and 
   filling a remaining portion of the first opening with a first metal filling layer and filling a remaining portion of the second opening with a second metal filling layer.   
     
     
         8 . The method for preparing a semiconductor device structure of  claim 7 , wherein the first silicon-containing layer and the second silicon-containing layer are formed by soaking the first opening and the second opening in silane. 
     
     
         9 . The method for preparing a semiconductor device structure of  claim 7 , wherein a bottom surface and sidewalls of the first opening are covered by the first silicon-containing layer, and a bottom surface and sidewalls of the second opening are covered by the second silicon-containing layer. 
     
     
         10 . The method for preparing a semiconductor device structure of  claim 7 , wherein the forming the first metal silicide structure and the second metal silicide structure further comprises:
 forming a third silicon-containing layer and a fourth silicon-containing layer over the first metal silicide layer and the second metal silicide layer, respectively; and   transforming the third silicon-containing layer and the fourth silicon-containing layer into a third metal silicide layer and a fourth metal silicide layer, respectively.   
     
     
         11 . The method for preparing a semiconductor device structure of  claim 7 , wherein the first metal filling layer is separated from the dielectric layer by the first metal silicide structure, and the second metal filling layer is separated from the dielectric layer by the second metal silicide structure. 
     
     
         12 . A method for preparing a semiconductor device structure, comprising:
 forming a sacrificial layer over a semiconductor substrate;   forming a first opening and a second opening penetrating through the sacrificial layer, wherein a first width of the first opening is different from a second width of the second opening;   filling the first opening and the second opening with a first metal pillar and a second metal pillar;   removing the sacrificial layer after the first metal pillar and the second metal pillar are formed; and   reducing a width of the first metal pillar and a width of the second metal pillar after the sacrificial layer is removed.   
     
     
         13 . The method for preparing a semiconductor device structure of  claim 12 , wherein the width of the first metal pillar is reduced by performing an oxidation process, such that a portion of the metal pillar is transformed into a metal oxide layer. 
     
     
         14 . The method for preparing a semiconductor device structure of  claim 13 , wherein the metal oxide layer covers a top surface and sidewalls of a remaining portion of the first metal pillar. 
     
     
         15 . The method for preparing a semiconductor device structure of  claim 14 , further comprising:
 forming a dielectric layer covering the metal oxide layer; and   performing a planarization process to expose the remaining portion of the first metal pillar.   
     
     
         16 . The method for preparing a semiconductor device structure of  claim 14 , further comprising:
 removing the metal oxide layer to expose the remaining portion of the first metal pillar;   forming a dielectric layer covering the remaining portion of the first metal pillar; and   performing a planarization process to expose the remaining portion of the first metal pillar.