Display panel
Abstract
Disclosed is a display panel including a substrate, a light-emitting unit, a pixel circuit, a scan driver, and an emission driver. The light-emitting unit is arranged on the substrate. The pixel circuit is arranged on the substrate. The pixel circuit includes a data input transistor, a driving transistor, and an emission transistor. The data input transistor is configured to receive a data signal according to a scan signal. The driving transistor is configured to provide a driving current based on the data signal. The emission transistor is configured to transfer the driving current to the light-emitting unit according to an emission signal. The scan driver is arranged on the substrate and is configured to output the scan signal. The emission driver is arranged on the substrate and is configured to output the emission signal. The pixel circuit is arranged between the scan driver and the emission driver.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A display panel, comprising:
a substrate; a light-emitting unit arranged on the substrate; a pixel circuit arranged on the substrate and comprising:
a data input transistor configured to receive a data signal according to a scan signal;
a driving transistor configured to provide a driving current based on the data signal; and
an emission transistor configured to transfer the driving current to the light-emitting unit according to an emission signal;
a scan driver arranged on the substrate and configured to output the scan signal; and an emission driver arranged on the substrate and configured to output the emission signal, wherein the pixel circuit is arranged between the scan driver and the emission driver.
2 . The display panel according to claim 1 , wherein the pixel circuit further comprises a sensing transistor, the sensing transistor is configured to sense the driving current according to a sensing signal, and the display panel further comprises:
a sensing driver arranged on the substrate and configured to output the sensing signal.
3 . The display panel according to claim 2 , wherein the scan driver is closer to a central region of the substrate than the sensing driver is.
4 . The display panel according to claim 2 , wherein the emission driver is closer to a central region of the substrate than the sensing driver is.
5 . The display panel according to claim 1 , further comprising:
an opaque pattern insulated from the pixel circuit, wherein an area of the opaque pattern is substantially equal to an area of the scan driver or an area of the emission driver.
6 . The display panel according to claim 1 , further comprising:
a circuit board electrically connected to the scan driver through a first signal line, and electrically connected to the data input transistor through a second signal line, wherein the first signal line and the second signal line are overlapped.
7 . The display panel according to claim 6 , wherein a part of the first signal line and a part of the second signal line are respectively arranged on two opposite side surfaces of the substrate.
8 . The display panel according to claim 6 , wherein a part of the first signal line and a part of the second signal line penetrate the substrate.
9 . The display panel according to claim 6 , wherein the first signal line comprises a low-level gate voltage, a reset signal, a high-level gate voltage, a start signal, a first vertical clock, or a second vertical clock, and the second signal line comprises a data line.
10 . The display panel according to claim 1 , wherein the substrate comprises a first surface and a second surface opposite to each other, the light-emitting unit is arranged on the first surface, and a circuit board is arranged on the second surface.
11 . The display panel according to claim 1 , wherein a signal transfer path of at least one of the scan driver and the emission driver is transferring from a central region to both sides of the substrate.
12 . The display panel according to claim 1 , wherein the substrate comprises a gate driver arrangement region and a non-gate driver arrangement region arranged at intervals, the pixel circuit is arranged in the gate driver arrangement region and the non-gate driver arrangement region, the scan driver is arranged in the gate driver arrangement region, and the emission driver is arranged in the gate driver arrangement region.
13 . The display panel according to claim 12 , wherein a sensing driver is arranged in the gate driver arrangement region.
14 . The display panel according to claim 12 , wherein the substrate has a first side and a second side opposite to each other, and the scan driver and the emission driver are away from the first side and the second side.
15 . The display panel according to claim 14 , wherein a sensing driver is adjacent to the first side and the second side.
16 . The display panel according to claim 12 , wherein an opaque pattern is arranged in the non-gate driver arrangement region.
17 . The display panel according to claim 16 , wherein an area of the opaque pattern is substantially equal to an area of a sensing driver.
18 . The display panel according to claim 12 , wherein a transmittance of the non-gate driver arrangement region is substantially equal to a transmittance of the gate driver arrangement region.
19 . The display panel according to claim 12 , wherein the substrate comprises a central region, a first side region, and a second side region, the first side region and the second side region are respectively arranged on opposite sides of the central region, and the scan driver and the emission driver are arranged in the central region.
20 . The display panel according to claim 19 , wherein a sensing driver is arranged in the first side region or the second side region.Join the waitlist — get patent alerts
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