Pmosfet source drain
Abstract
A semiconductor device according to the present disclosure includes a first source/drain epitaxial feature and a second source/drain epitaxial feature each having an outer liner layer and an inner filler layer, a plurality of channel members extending between the first source/drain epitaxial feature and the second source/drain epitaxial feature along a first direction, and a gate structure disposed over and around the plurality of channel members. The plurality of channel members are in contact with the outer liner layer and are spaced apart from the inner filler layer. The outer liner layer comprises germanium and boron and the inner filler layer comprises germanium and gallium.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method, comprising:
forming a stack over a substrate, wherein the stack comprises a plurality of channel layers interleaved by a plurality of sacrificial layers; forming a fin-shaped structure from the stack and the substrate, the fin-shaped structure comprising a channel region and a source/drain region; recessing the source/drain region to form a source/drain trench that exposes sidewalls of the plurality of channel layers and the plurality of sacrificial layers; selectively and partially recessing the plurality of sacrificial layers to form a plurality of inner spacer recesses; forming a plurality of inner spacer features in the plurality of inner spacer recesses; after the forming of the plurality of inner spacer features, depositing an outer epitaxial layer in the source/drain trench, the outer epitaxial layer comprising a first p-type dopant; and depositing an inner epitaxial layer over the outer epitaxial layer, the inner epitaxial layer comprising a second p-type dopant different from the first p-type dopant, wherein the inner epitaxial layer is spaced apart from the plurality of channel layers by the outer epitaxial layer.
2 . The method of claim 1 , wherein the plurality of channel layers comprise germanium (Ge) and the plurality of sacrificial layers comprise silicon germanium (SiGe).
3 . The method of claim 1 , wherein the outer epitaxial layer and the inner epitaxial layer comprise germanium (Ge) or germanium tin (GeSn).
4 . The method of claim 1 , wherein the first p-type dopant comprises boron (B) and the second p-type dopant comprises gallium (Ga).
5 . The method of claim 1 , wherein a doping concentration of the first p-type dopant in the outer epitaxial layer is between about 5×10 19 atoms/cm 3 and about 5×10 20 atoms/cm 3 .
6 . The method of claim 1 , wherein a doping concentration of the second p-type dopant in the inner epitaxial layer is between about 3×10 20 atoms/cm 3 and about 1×10 21 atoms/cm 3 .
7 . The method of claim 1 , wherein the outer epitaxial layer comprises a thickness between about 1 nm and about 6 nm.
8 . The method of claim 1 , wherein the inner epitaxial layer comprises a thickness between about 1 nm and about 6 nm.
9 . A method, comprising:
forming a stack over a substrate, wherein the stack comprises a plurality of channel layers interleaved by a plurality of sacrificial layers; forming a fin-shaped structure from the stack and the substrate, the fin-shaped structure comprising a channel region and a source/drain region; recessing the source/drain region to form a source/drain trench that exposes sidewalls of the plurality of channel layers and the plurality of sacrificial layers; selectively and partially recessing the plurality of sacrificial layers to form a plurality of inner spacer recesses; forming a plurality of inner spacer features in the plurality of inner spacer recesses; after the forming of the plurality of inner spacer features, depositing an outer epitaxial layer in the source/drain trench, the outer epitaxial layer being doped with boron (B); and depositing an inner epitaxial layer over the outer epitaxial layer, the inner epitaxial layer being doped with gallium (Ga).
10 . The method of claim 9 , wherein the plurality of channel layers comprise germanium (Ge) and the plurality of sacrificial layers comprise silicon germanium (SiGe).
11 . The method of claim 9 , wherein the outer epitaxial layer and the inner epitaxial layer comprise germanium (Ge) or germanium tin (GeSn).
12 . The method of claim 10 , further comprising:
forming a dummy gate stack over the channel region of the fin-shaped structure; depositing a gate spacer layer over the dummy gate stack; removing the dummy gate stack; selectively removing the plurality of sacrificial layers in the channel region; and forming a gate structure around each of the plurality of channel layers in the channel region.
13 . The method of claim 9 , wherein a doping concentration of boron (B) in the outer epitaxial layer is between about 5×10 19 atoms/cm 3 and about 5×10 20 atoms/cm 3 .
14 . The method of claim 9 , wherein a doping concentration of gallium (Ga) in the inner epitaxial layer is between about 3×10 20 atoms/cm 3 and about 1×10 21 atoms/cm 3 .
15 . The method of claim 10 ,
wherein the outer epitaxial layer comprises a thickness between about 1 nm and about 6 nm, wherein the inner epitaxial layer comprises a thickness between about 1 nm and about 6 nm.
16 . A method, comprising:
forming a stack over a substrate, wherein the stack comprises a plurality of channel layers interleaved by a plurality of sacrificial layers; forming a fin-shaped structure from the stack and the substrate, the fin-shaped structure comprising a channel region and a source/drain region; forming a dummy gate stack over the channel region of the fin-shaped structure; depositing a gate spacer layer over the dummy gate stack; recessing the source/drain region to form a source/drain trench that exposes sidewalls of the plurality of channel layers and the plurality of sacrificial layers; selectively and partially recessing the plurality of sacrificial layers to form a plurality of inner spacer recesses; forming a plurality of inner spacer features in the plurality of inner spacer recesses; depositing an outer epitaxial layer in the source/drain trench, the outer epitaxial layer comprising a first p-type dopant; depositing an inner epitaxial layer over the outer epitaxial layer, the inner epitaxial layer comprising a second p-type dopant different from the first p-type dopant; removing the dummy gate stack; selectively removing the plurality of sacrificial layers in the channel region; and forming a gate structure around each of the plurality of channel layers in the channel region, wherein the plurality of channel layers comprise germanium (Ge) and the plurality of sacrificial layers comprise silicon germanium (SiGe).
17 . The method of claim 16 , wherein the first p-type dopant comprises boron (B) and the second p-type dopant comprises gallium (Ga).
18 . The method of claim 16 , wherein the depositing of the outer epitaxial layer comprises depositing the outer epitaxial layer over the plurality of inner spacer features.
19 . The method of claim 17 , wherein a doping concentration of boron (B) in the outer epitaxial layer is between about 5×10 19 atoms/cm 3 and about 5×10 20 atoms/cm 3 .
20 . The method of claim 17 , wherein a doping concentration of gallium (Ga) in the inner epitaxial layer is between about 3×10 20 atoms/cm 3 and about 1×10 21 atoms/cm 3 .Join the waitlist — get patent alerts
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