US2022384652A1PendingUtilityA1

Semiconductor device and manufacturing method thereof

Assignee: SONY GROUP CORPPriority: Aug 9, 2010Filed: Aug 3, 2022Published: Dec 1, 2022
Est. expiryAug 9, 2030(~4 yrs left)· nominal 20-yr term from priority
Inventors:Satoru Mayuzumi
H01L 29/66545H01L 29/7848H01L 29/49H01L 29/7834H01L 29/66795H01L 29/785H01L 29/7843H10D 30/62H10D 30/608H10D 30/024H10D 30/0291H10D 64/017H10D 64/68H10D 64/66H10D 30/797H10D 30/792
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Claims

Abstract

A semiconductor device includes a field effect transistor including: a semiconductor substrate including a channel forming region; a gate insulating film formed at the channel forming region on the semiconductor substrate; a gate electrode formed over the gate insulating film; a first stress application layer formed over the gate electrode and applying stress to the channel forming region; a source/drain region formed on a surface layer portion of the semiconductor substrate at both sides of the gate electrode and the first stress application layer; and a second stress application layer formed over the source/drain region in a region other than at least a region of the first stress application layer and applying stress different from the first stress application layer to the channel forming region.

Claims

exact text as granted — not AI-modified
1 - 24 . (canceled) 
     
     
         25 . A semiconductor device including a field effect transistor comprising:
 a semiconductor substrate including a channel forming region;   a gate insulating film formed at the channel forming region and formed at least partially on a first insulating film;   a gate electrode formed over the gate insulating film, wherein the gate insulating film extends in a first direction along one or more sidewall surfaces of the gate electrode and extends in a second direction which intersects with a source-drain direction that is different than the first direction, between and along another surface of the gate electrode and a surface of the first insulating film;   a first silicon nitride insulating layer formed over the gate electrode;   a source/drain region formed on the semiconductor substrate; and   a second silicon nitride insulating layer formed over the source/drain region in a region other than at least a region of the first silicon nitride insulating layer,   wherein the field effect transistor is a fin-type field effect transistor,   wherein the gate insulating film makes contact with a first sidewall insulating film and a second sidewall insulating film in the second direction, and   wherein a distance from an inner sidewall of the first sidewall insulating film to the channel forming region is different from a distance from an inner sidewall of the second sidewall insulating film to the channel forming region in the second direction.   
     
     
         26 . The semiconductor device according to  claim 25 , wherein the first silicon nitride insulating layer is interposed between the second silicon nitride insulating layer. 
     
     
         27 . The semiconductor device according to  claim 25 , wherein the source/drain region is formed from a mixed crystal layer including silicon and atoms different in lattice constant from silicon. 
     
     
         28 . The semiconductor device according to  claim 27 , wherein the mixed crystal layer comprises silicon and germanium. 
     
     
         29 . The semiconductor device according to  claim 28 , wherein the first silicon nitride insulating layer is a first stress application layer, and the second silicon nitride insulating layer is a second stress application layer. 
     
     
         30 . The semiconductor device according to  claim 29 , wherein the first stress application layer applies a first stress to the channel forming region and the second stress application layer applies a second stress to the channel forming region, and a direction of the first stress is different from a direction of the second stress. 
     
     
         31 . The semiconductor device according to  claim 25 , wherein the first region forms a concave shape for receiving the gate electrode. 
     
     
         32 . The semiconductor device according to  claim 25 , wherein the gate electrode makes contact with the first sidewall insulating film and the second sidewall insulating film in the second direction. 
     
     
         33 . The semiconductor device according to  claim 25 , wherein the first sidewall insulating film and the second sidewall insulating film surround the gate electrode. 
     
     
         34 . The semiconductor device according to  claim 25 , wherein
 the gate insulating film is formed to include a first side surface, a second side surface, and a bottom surface, the first and second side surfaces extending in the first direction and the bottom surface extending in the source-drain direction, the first and second side surfaces and the bottom surface forming a first region, and   the gate electrode is formed in the first region over the bottom surface.   
     
     
         35 . The semiconductor device according to  claim 34 , wherein the first silicon nitride insulating layer makes contact with the first sidewall insulating film and the second sidewall insulating film in the second direction. 
     
     
         36 . The semiconductor device according to  claim 34 , wherein the first sidewall insulating film and the second sidewall insulating film surround the gate electrode. 
     
     
         37 . The semiconductor device according to  claim 25 , wherein the first silicon nitride insulating layer makes contact with the first sidewall insulating film and the second sidewall insulating film in the second direction. 
     
     
         38 . A semiconductor device including a field effect transistor comprising:
 a semiconductor substrate including a fin shape channel forming region;   a gate insulating film formed at the fin shape channel forming region and formed at least partially on a first insulating film;   a gate electrode formed over the gate insulating film, wherein a first portion of the gate insulating film comprises a first region that extends along a first direction which intersects with a source-drain direction of the fin shape channel forming region, and a second portion of the gate insulating film comprises another region other than the first region, the another region extending in the first direction;   a first silicon nitride insulating layer formed over the gate electrode;   a source/drain region formed on the semiconductor substrate; and   a second silicon nitride insulating layer formed over the source/drain region at a region other than at least a region of the first silicon nitride insulating layer,   wherein the field effect transistor is a fin-type field effect transistor,   wherein the gate insulating film makes contact with a first sidewall insulating film and a second sidewall insulating film in the first direction, and   wherein a distance from an inner sidewall of the first sidewall insulating film to the channel forming region is different from a distance from an inner sidewall of the second sidewall insulating film to the channel forming region in the first direction.   
     
     
         39 . The semiconductor device according to  claim 38 , wherein the first silicon nitride insulating layer is interposed between the second silicon nitride insulating layer. 
     
     
         40 . The semiconductor device according to  claim 38 , wherein the second region forms a concave shape for receiving the gate electrode. 
     
     
         41 . The semiconductor device according to  claim 38 , wherein the gate electrode makes contact with the first sidewall insulating film and the second sidewall insulating film in the first direction. 
     
     
         42 . The semiconductor device according to  claim 38 , wherein the first sidewall insulating film and the second sidewall insulating film surround the gate electrode. 
     
     
         43 . The semiconductor device according to  claim 38 , wherein
 the gate insulating film is formed to include a first side surface, a second side surface, and a bottom surface, the first and second side surfaces extending in a second direction along one or more sidewall surfaces of the gate electrode and the bottom surface extending in the source-drain direction, the first and second side surfaces and the bottom surface forming a first region, and   the gate electrode is formed in the first region over the bottom surface.   
     
     
         44 . The semiconductor device according to  claim 43 , wherein the first silicon nitride insulating layer makes contact with the first sidewall insulating film and the second sidewall insulating film in the first direction. 
     
     
         45 . The semiconductor device according to  claim 43 , wherein the first sidewall insulating film and the second sidewall insulating film surround the gate electrode. 
     
     
         46 . The semiconductor device according to  claim 38 , wherein the first silicon nitride insulating layer makes contact with the first sidewall insulating film and the second sidewall insulating film in the first direction. 
     
     
         47 . A semiconductor device including a field effect transistor comprising:
 a semiconductor substrate including a fin shape channel forming region;   a gate insulating film formed at the channel forming region and formed at least partially on a first insulating film;   a gate electrode formed over the gate insulating film,   wherein the gate insulating film includes a first portion that extends along a first direction which intersects with a source-drain direction and along a second direction protruding from the semiconductor substrate, and a second portion that extends from the first portion in the first direction between the gate electrode and the first insulating film;   a first silicon nitride insulating layer formed over the gate electrode;   a source/drain region formed on the semiconductor substrate; and   a second silicon nitride insulating layer formed over the source/drain region in a region other than at least a region of the first silicon nitride insulating layer,   wherein the field effect transistor is a fin-type field effect transistor,   wherein the gate insulating film makes contact with a first sidewall insulating film and a second sidewall insulating film in the first direction, and   wherein a distance from an inner sidewall of the first sidewall insulating film to the channel forming region is different from a distance from an inner sidewall of the second sidewall insulating film to the channel forming region in the first direction.   
     
     
         48 . The semiconductor device according to  claim 47 , wherein the first silicon nitride insulating layer is interposed between the second silicon nitride insulating layer. 
     
     
         49 . The semiconductor device according to  claim 47 , wherein the first region forms a concave shape for receiving the gate electrode. 
     
     
         50 . The semiconductor device according to  claim 47 , wherein the gate electrode makes contact with the first sidewall insulating film and the second sidewall insulating film in the first direction. 
     
     
         51 . The semiconductor device according to  claim 47 , wherein the first sidewall insulating film and the second sidewall insulating film surround the gate electrode. 
     
     
         52 . The semiconductor device according to  claim 47 , wherein
 the gate insulating film is formed to include a first side surface, a second side surface, and a bottom surface, the first and second side surfaces extending in the second direction and the bottom surface extending in the source-drain direction, the first and second side surfaces and the bottom surface forming a first region, and   the gate electrode is formed in the first region over the bottom surface.   
     
     
         53 . The semiconductor device according to  claim 52 , wherein the first silicon nitride insulating layer makes contact with the first sidewall insulating film and the second sidewall insulating film in the first direction. 
     
     
         54 . The semiconductor device according to  claim 52 , wherein the first sidewall insulating film and the second sidewall insulating film surround the gate electrode. 
     
     
         55 . The semiconductor device according to  claim 47 , wherein the first silicon nitride insulating layer makes contact with the first sidewall insulating film and the second sidewall insulating film in the first direction. 
     
     
         56 . A semiconductor device including a field effect transistor comprising:
 a semiconductor substrate including a channel forming region;   a gate insulating film formed to include a first side surface, a second side surface and a bottom surface, the first and second side surfaces extending in a first direction, and the bottom surface extending in a source-drain direction, the first and second side surfaces and the bottom surface forming a first region;   a gate electrode formed in the first region over the bottom surface;   a first silicon nitride insulating layer formed over the gate electrode;   a source/drain region formed on the semiconductor substrate; and   a second silicon nitride insulating layer formed in a second region other than the first region,   wherein the field effect transistor is a fin-type field effect transistor,   wherein the gate insulating film makes contact with a first sidewall insulating film and a second sidewall insulating film in a second direction which intersects with the source-drain direction, and   wherein a distance from an inner sidewall of the first sidewall insulating film to the channel forming region is different from a distance from an inner sidewall of the second sidewall insulating film to the channel forming region in the second direction.   
     
     
         57 . The semiconductor device according to  claim 56 , wherein the first silicon nitride insulating layer is interposed between the second silicon nitride insulating layer. 
     
     
         58 . The semiconductor device according to  claim 56 , wherein the first region forms a concave shape for receiving the gate electrode. 
     
     
         59 . The semiconductor device according to  claim 56 , wherein the first sidewall insulating film and the second sidewall insulating film surround the gate electrode. 
     
     
         60 . The semiconductor device according to  claim 56 , wherein the first silicon nitride insulating layer makes contact with the first sidewall insulating film and the second sidewall insulating film in the second direction.

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