US2022384622A1PendingUtilityA1

Method for manufacturing semiconductor device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Jun 30, 2009Filed: Aug 9, 2022Published: Dec 1, 2022
Est. expiryJun 30, 2029(~2.9 yrs left)· nominal 20-yr term from priority
H01L 27/124H01L 29/42356H01L 29/24H01L 29/66742H01L 27/1225H01L 29/7869H01L 29/78606H01L 29/66969H01L 29/78618H01L 29/78696H01L 29/42384H10D 86/451H10D 86/441H10D 86/60H10D 86/423H10D 64/512H10D 62/80H10D 30/6757H10D 30/6755H10D 30/6713H10D 30/6704H10D 30/673H10D 30/031H10D 99/00H10K 59/1213H10K 59/123H10K 59/131
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Claims

Abstract

It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a circuit, the circuit comprising:
 a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a seventh transistor; and 
 a first wiring, a second wiring, a third wiring, a fourth wiring, a fifth wiring, and a sixth wiring, 
   wherein one of a source and a drain of the first transistor is electrically connected to the second wiring,   wherein the other of the source and the drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to the first wiring,   wherein the first wiring outputs a signal,   wherein the other of the source and the drain of the second transistor is electrically connected to the fourth wiring, one of a source and a drain of the third transistor, one of a source and a drain of the fourth transistor, one of a source and a drain of the fifth transistor, and one of a source and a drain of the sixth transistor,   wherein a gate of the second transistor is electrically connected to a gate of the third transistor and the other of the source and the drain of the fourth transistor,   wherein a gate of the fifth transistor is electrically connected to the fifth wiring,   wherein a gate of the first transistor is electrically connected to a gate of the fourth transistor, the other of the source and the drain of the third transistor, and the other of the source and the drain of the fifth transistor,   wherein the other of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the seventh transistor,   wherein the other of the source and the drain of the seventh transistor is electrically connected to the sixth wiring, and   wherein a gate of the seventh transistor is electrically connected to the third wiring.   
     
     
         3 . The semiconductor device according to  claim 2 ,
 wherein a signal from an (n−1)-th stage is input into the third wiring.   
     
     
         4 . A semiconductor device comprising:
 a circuit, the circuit comprising:
 a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor; and 
 a first wiring, a second wiring, a third wiring, a fourth wiring, a fifth wiring, and a sixth wiring, 
   wherein one of a source and a drain of the first transistor is electrically connected to the second wiring,   wherein the other of the source and the drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to the first wiring,   wherein the first wiring outputs a signal,   wherein the other of the source and the drain of the second transistor is electrically connected to the fourth wiring, one of a source and a drain of the third transistor, one of a source and a drain of the fourth transistor, one of a source and a drain of the fifth transistor, and one of a source and a drain of the sixth transistor,   wherein a gate of the second transistor is electrically connected to a gate of the third transistor and the other of the source and the drain of the fourth transistor,   wherein a gate of the fifth transistor is electrically connected to the fifth wiring,   wherein a gate of the first transistor is electrically connected to a gate of the fourth transistor, the other of the source and the drain of the third transistor, and the other of the source and the drain of the fifth transistor,   wherein the other of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the seventh transistor,   wherein the other of the source and the drain of the seventh transistor is electrically connected to the sixth wiring,   wherein a gate of the seventh transistor is electrically connected to the third wiring, and   wherein one of a source and a drain of the eighth transistor is electrically connected to the other of the source and the drain of the fourth transistor.   
     
     
         5 . The semiconductor device according to  claim 2 , wherein only one transistor is connected to the second wiring in this stage. 
     
     
         6 . The semiconductor device according to  claim 4 , wherein only one transistor is connected to the second wiring in this stage. 
     
     
         7 . A semiconductor device comprising:
 a circuit, the circuit comprising:
 a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor; and 
 a first wiring, a second wiring, a third wiring, a fourth wiring, a fifth wiring, and a sixth wiring, 
   wherein one of a source and a drain of the first transistor is electrically connected to the second wiring,   wherein the other of the source and the drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to the first wiring,   wherein the first wiring outputs a signal,   wherein the other of the source and the drain of the second transistor is electrically connected to the fourth wiring, one of a source and a drain of the third transistor, one of a source and a drain of the fourth transistor, and one of a source and a drain of the sixth transistor,   wherein a gate of the second transistor is electrically connected to a gate of the third transistor, the other of the source and the drain of the fourth transistor, and the other of the source and the drain of the sixth transistor,   wherein a gate of the seventh transistor is electrically connected to the third wiring,   wherein a gate of the fifth transistor is electrically connected to the fifth wiring,   wherein one of a source and a drain of the seventh transistor is electrically connected to the sixth wiring and a gate of the eighth transistor, and   wherein the other of the source and the drain of the seventh transistor is electrically connected to one of a source and a drain of the fifth transistor.   
     
     
         8 . The semiconductor device according to  claim 7 ,
 wherein the other of the source and the drain of the seventh transistor is electrically connected to the other of the source and the drain of the third transistor, a gate of the fourth transistor, and a gate of the first transistor.   
     
     
         9 . The semiconductor device according to  claim 7 ,
 wherein the third wiring is electrically connected to an (n−1)-th stage, and   wherein the fifth wiring is electrically connected to the (n+1)-th stage.

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