US2022382519A1PendingUtilityA1
Random number generation method
Est. expiryMay 28, 2041(~14.8 yrs left)· nominal 20-yr term from priority
Inventors:Roger P. Simon
G06F 7/582G06F 7/588G06F 7/58
59
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Claims
Abstract
A random number generator is implemented within a digital processor by: a) searching an internal timestamp register which counts clock pulses for sequencing the processor; b) extracting at a given time n bits from the least significant bits of the register, n>1; c) using the n bits extracted at step b) as constituent bit(s) of a N-bit random number (34) to be generated; d) reiterating steps a) to c) until obtaining the N bits of the random number; and e) providing the random number to an application circuit or software.
Claims
exact text as granted — not AI-modified1 . A random number generation method implemented by means of a digital processor, the method comprising:
a) searching an internal timestamp register which counts clock pulses for sequencing the processor; b) extracting at a given time n bits from the least significant bits of the register, n>1; c) using the n bits extracted at step b) as constituent bit(s) of a random number of N bits to be generated; d) reiterating steps a) to c) until obtaining the N bits of the random number; and e) providing the random number to an application circuit or software.
2 . The method of claim 1 , wherein the timestamp register is a register counting pulses directly outputted from an oscillator of the clock.
3 . The method of claim 1 , wherein steps a) to d) are carried out within a firmware of the processor.
4 . The method of claim 1 , wherein the n bits extracted at step b) are the least significant bit(s) of the timestamp register.
5 . The method of claim 4 , wherein n=1 and the bit extracted at step b) is the least significant bit of the timestamp register.
6 . The method of claim 1 , wherein the given time of extraction of the n bits at step b) is a time controlled by a random or pseudo-random generator.
7 . The method of claim 1 , wherein the given time of extraction of the n bits at step b) is a time determined in response to a request received from the application circuit or software.Join the waitlist — get patent alerts
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