Plasma etcher edge ring with a chamfer geometry and impedance design

Abstract

An edge ring, for a plasma etcher, may include a circular bottom portion with an opening sized to receive an electrostatic chuck supporting a semiconductor device, and a circular top portion integrally connected to a first top part of the circular bottom portion. The edge ring may include a circular chamfer portion integrally connected to a second top part of the circular bottom portion and integrally connected to a side of the circular top portion. The circular chamfer portion may include an inner surface that is angled radially outward from the opening at less than ninety degrees.

What is claimed is: 
     
         1 . An edge ring for a plasma etcher, the edge ring comprising:
 a circular bottom portion with an opening sized to receive an electrostatic chuck supporting a semiconductor device;   a circular top portion integrally connected to a first top part of the circular bottom portion; and   a circular chamfer portion integrally connected to a second top part of the circular bottom portion and integrally connected to a side of the circular top portion,
 wherein the circular chamfer portion includes an inner surface that is angled radially outward from the opening at less than ninety degrees, 
 wherein the inner surface extends below a top surface of the semiconductor device to connect to a top surface of the circular bottom portion, and 
 wherein a distance between an edge of the semiconductor device and the inner surface is greater than zero millimeters and less than or equal to four millimeters. 
   
     
     
         2 . The edge ring of  claim 1 , wherein the distance between the edge of the semiconductor device and the inner surface is less than or equal to two millimeters. 
     
     
         3 . The edge ring of  claim 1 , wherein the inner surface is angled in a range from approximately ten degrees to approximately seventy degrees. 
     
     
         4 . The edge ring of  claim 1 , wherein a first distance between the top surface of the circular top portion and a bottom surface of the circular bottom portion is greater than a second distance between the top surface of the semiconductor device and a bottom surface of the electrostatic chuck. 
     
     
         5 . The edge ring of  claim 4 , wherein the first distance is greater than the second distance by a range from approximately zero millimeters to approximately 3.75 millimeters. 
     
     
         6 . The edge ring of  claim 4 , wherein the first distance is greater than the second distance by a range from approximately zero millimeters to approximately 1.5 millimeters. 
     
     
         7 . The edge ring of  claim 1 , wherein the edge ring comprises a metal. 
     
     
         8 . The edge ring of  claim 1 , wherein, in a cross-sectional view of the edge ring, the top surface of the circular bottom portion extends partially underneath the semiconductor device. 
     
     
         9 . A method of processing a semiconductor device with a plasma etcher, the method comprising:
 providing the semiconductor device on an electrostatic chuck of the plasma etcher;   providing an edge ring around the semiconductor device and the electrostatic chuck,
 wherein the edge ring includes: 
 a circular bottom portion with an opening sized to receive the electrostatic chuck, 
 a circular top portion integrally connected to a first top part of the circular bottom portion; and 
 a chamfer portion integrally connected to a second top part of the circular bottom portion and integrally connected to a side of the circular top portion, 
 wherein the chamfer portion includes an inner surface that is angled radially outward from the opening at less than ninety degrees, 
 wherein the inner surface extends below a top surface of the semiconductor device to connect to a top surface of the circular bottom portion, and 
 wherein a distance between an edge of the semiconductor device and the inner surface is greater than zero millimeters and less than or equal to four millimeters; and 
   causing a plasma to be provided to the semiconductor device,
 wherein the plasma etches one or more portions of the semiconductor device. 
   
     
     
         10 . The method of  claim 9 , further comprising:
 providing a bias voltage to the edge ring while the plasma is provided to the semiconductor device.   
     
     
         11 . The method of  claim 9 , wherein providing the edge ring around the semiconductor device and the electrostatic chuck comprises:
 providing the edge ring to extend partially underneath the semiconductor device in a cross-sectional view of the edge ring.   
     
     
         12 . The method of  claim 9 , wherein the inner surface is angled in a range from approximately ten degrees to approximately seventy degrees. 
     
     
         13 . The method of  claim 9 , wherein the distance between the edge of the semiconductor device and the inner surface is less than or equal to two millimeters. 
     
     
         14 . The method of  claim 9 , wherein a first distance between the top surface of the circular top portion and a bottom surface of the circular bottom portion is greater than a second distance between the top surface of the semiconductor device and a bottom surface of the electrostatic chuck. 
     
     
         15 . A plasma etcher, comprising:
 a chamber;   a plasma gas inlet attached to the chamber and to receive a plasma gas;   an electrostatic chuck provided in the chamber and to support a semiconductor device; and   an edge ring provided in the chamber and to surround the electrostatic chuck and the semiconductor device,
 wherein the edge ring includes: 
 a circular bottom portion with an opening sized to receive the electrostatic chuck, 
 a circular top portion integrally connected to a first top part of the circular bottom portion; and 
 a chamfer portion integrally connected to a second top part of the circular bottom portion and integrally connected to a side of the circular top portion,
 wherein the chamfer portion includes an inner surface that is angled radially outward from an edge of the semiconductor device, 
 wherein the inner surface extends below a top surface of the semiconductor device to connect to a top surface of the circular bottom portion, and 
 wherein a distance between the edge of the semiconductor device and the inner surface is greater than zero millimeters and less than or equal to four millimeters. 
 
   
     
     
         16 . The plasma etcher of  claim 15 , wherein the inner surface is angled in a range from approximately ten degrees to approximately seventy degrees. 
     
     
         17 . The plasma etcher of  claim 15 , wherein a first distance between the top surface of the circular top portion and a bottom surface of the circular bottom portion is greater than a second distance between the top surface of the semiconductor device and a bottom surface of the electrostatic chuck. 
     
     
         18 . The plasma etcher of  claim 15 , wherein the distance between the edge of the semiconductor device and the inner surface is less than or equal to two millimeters. 
     
     
         19 . The plasma etcher of  claim 15 , further comprising:
 a plasma sheath to cause the plasma gas to remain near the top surface of the semiconductor device.   
     
     
         20 . The plasma etcher of  claim 15 , further comprising:
 a power supply to provide a bias voltage to the edge ring.