Apparatus and methods for effective impurity gettering

Abstract

Apparatus and methods for effective impurity gettering are described herein. In some embodiments, a described device includes: a substrate; a pixel region disposed in the substrate; an isolation region disposed in the substrate and within a proximity of the pixel region; and a heterogeneous layer on the seed area. The isolation region comprises a seed area including a first semiconductor material. The heterogeneous layer comprises a second semiconductor material that has a lattice constant different from that of the first semiconductor material.

What is claimed is: 
     
         1 . A method for forming a device comprising at least one pixel cell, comprising:
 providing a substrate comprising a first semiconductor material;   forming a pixel region inside the substrate;   forming a trench extending into the substrate and within a proximity of the pixel region; and   epitaxially growing a heterogeneous layer on a bottom surface of the trench, wherein the heterogeneous layer comprises a second semiconductor material that has a lattice constant different from that of the first semiconductor material.   
     
     
         2 . The method of  claim 1 , wherein forming the trench comprises:
 depositing a hard mask on the substrate;   depositing a patterned photoresist on the hard mask; and   etching the substrate to form the trench based on the patterned photoresist and the hard mask.   
     
     
         3 . The method of  claim 1 , further comprising doping the substrate to form an isolation region inside the substrate and within a proximity of the pixel region, wherein:
 the trench is formed in the isolation region;   the heterogeneous layer provides a gettering of at least one of metal ions, dot-defects, or impurities in the substrate; and   the isolation region is configured for isolating the heterogeneous layer from charge carriers generated in the substrate.   
     
     
         4 . The method of  claim 1 , wherein epitaxially growing the heterogeneous layer comprises:
 epitaxially growing the second semiconductor material with a dopant in the trench.   
     
     
         5 . The method of  claim 4 , wherein epitaxially growing the heterogeneous layer further comprises:
 annealing the device so as to drive the dopant into the substrate to form an isolation region around the heterogeneous layer, wherein the dopant has a conductivity type being n-type or p-type.   
     
     
         6 . The method of  claim 1 , further comprising depositing an oxide material on the heterogeneous layer to form a trench isolation structure within the trench. 
     
     
         7 . A method, comprising:
 providing a substrate;   forming a pixel region in the substrate;   forming an isolation region in the substrate and within a proximity of the pixel region, wherein the isolation region comprises a seed area including a first semiconductor material;   forming a trench structure extending into the isolation region, wherein the trench structure is on the seed area and not in contact with the pixel region; and   filling the trench structure on the seed area with a heterogeneous layer, wherein the heterogeneous layer comprises a second semiconductor material that has a lattice constant different from that of the first semiconductor material.   
     
     
         8 . The method of  claim 7 , wherein strains, defects and dislocations originate within the heterogeneous layer and terminate at hetero-interfaces between the heterogeneous layer and the isolation region. 
     
     
         9 . The method of  claim 8 , wherein the strains, defects and dislocations are located in proximity to the hetero-interfaces. 
     
     
         10 . The method of  claim 7 , wherein the heterogeneous layer provides a gettering of at least one of metal ions, dot-defects, or impurities in the substrate. 
     
     
         11 . The method of  claim 7 , wherein the heterogeneous layer has a depth greater than that of the pixel region. 
     
     
         12 . The method of  claim 7 , wherein:
 the isolation region comprises the first semiconductor material and a dopant and is configured for isolating the heterogeneous layer from charge carriers generated in the substrate; and   the dopant has a conductivity type being n-type or p-type.   
     
     
         13 . The method of  claim 7 , wherein the heterogeneous layer is disposed above the pixel region. 
     
     
         14 . The method of  claim 7 , wherein the pixel region comprises:
 a first light sensing region disposed in the substrate and comprising a first dopant of a first conductivity type; and   a second light sensing region disposed on the first light sensing region and comprising a second dopant of a second conductivity type.   
     
     
         15 . A method, comprising:
 providing a substrate;   forming a pixel region in the substrate, wherein the remaining portion of the substrate other than the pixel region forms a non-pixel region;   forming an isolation region in the non-pixel region of the substrate and within a proximity of the pixel region, wherein the isolation region comprises a seed area including a first semiconductor material; and   forming a heterogeneous layer on the seed area in the isolation region, wherein the heterogeneous layer has a depth greater than that of the pixel region, wherein the heterogeneous layer comprises a second semiconductor material that has a lattice constant different from that of the first semiconductor material.   
     
     
         16 . The method of  claim 15 , wherein strains, defects and dislocations originate within the heterogeneous layer and terminate at hetero-interfaces between the heterogeneous layer and the isolation region. 
     
     
         17 . The method of  claim 15 , wherein the strains, defects and dislocations are located in proximity to the hetero-interfaces. 
     
     
         18 . The method of  claim 15 , wherein the heterogeneous layer provides a gettering of at least one of metal ions, dot-defects, or impurities in the substrate. 
     
     
         19 . The method of  claim 15 , wherein:
 the isolation region comprises the first semiconductor material and a dopant and is configured for isolating the heterogeneous layer from charge carriers generated in the substrate; and   the dopant has a conductivity type being n-type or p-type.   
     
     
         20 . The method of  claim 15 , wherein the pixel region comprises:
 a first light sensing region disposed in the substrate and comprising a first dopant of a first conductivity type; and   a second light sensing region disposed on the first light sensing region and comprising a second dopant of a second conductivity type.