FinFET Having Non-Merging Epitaxially Grown Source/Drains

Abstract

A semiconductor device includes a layer having a semiconductive material. The layer includes an outwardly-protruding fin structure. An isolation structure is disposed over the layer but not over the fin structure. A first spacer and a second spacer are each disposed over the isolation structure and on sidewalls of the fin structure. The first spacer is disposed on a first sidewall of the fin structure. The second spacer is disposed on a second sidewall of the fin structure opposite the first sidewall. The second spacer is substantially taller than the first spacer. An epi-layer is grown on the fin structure. The epi-layer protrudes laterally. A lateral protrusion of the epi-layer is asymmetrical with respect to the first side and the second side.

What is claimed is: 
     
         1 . A semiconductor structure, comprising:
 a first fin structure disposed over a semiconductor layer;   a first spacer disposed along a first sidewall of the first fin structure;   a second spacer disposed along a second sidewall of the first fin structure; and   a first epitaxial layer disposed on the first fin structure and in contact with the first spacer and the second spacer,   wherein a top surface of the first spacer is lower than a top surface of the second spacer,   wherein the first epitaxial layer comprises a first side adjacent the first spacer and a second side adjacent the second spacer,   wherein the first side of the first epitaxial layer comprises a first protrusion portion to overhang the top surface of the first spacer and the second side of the first epitaxial layer extends parallel to the second spacer.   
     
     
         2 . The semiconductor structure of  claim 1 ,
 wherein the first epitaxial layer comprises a bottom portion, a middle portion over the bottom portion and a top portion over the middle portion,   wherein a width of the middle portion is greater than a width of the bottom portion or a width of the top portion.   
     
     
         3 . The semiconductor structure of  claim 1 , further comprising:
 a metal contact disposed on the first epitaxial layer.   
     
     
         4 . The semiconductor structure of  claim 3 ,
 wherein the metal contact is disposed directly over the first spacer,   wherein the metal contact does not overhang the second spacer.   
     
     
         5 . The semiconductor structure of  claim 3 ,
 wherein the first epitaxial layer comprises a bottom portion, a middle portion over the bottom portion and a top portion over the middle portion,   wherein a width of the metal contact is greater than a width of the middle portion of the first epitaxial layer.   
     
     
         6 . The semiconductor structure of  claim 1 , further comprising:
 a second fin structure disposed over the semiconductor layer; and   an isolation feature disposed over the semiconductor layer and between the first fin structure and the second fin structure,   wherein the second fin structure comprises a first side facing toward the first fin structure and a second side facing away from the first fin structure,   wherein the second spacer extends continuously from the second side of the first fin structure, to a top surface of the isolation feature, and then to the first side of the second fin structure.   
     
     
         7 . The semiconductor structure of  claim 6 , further comprising:
 a third spacer disposed along the second side of the second fin structure; and   a second epitaxial layer disposed on the second fin structure and in contact with the second spacer and the third spacer,   wherein a top surface of the third spacer is lower than the top surface of the second spacer,   wherein the second epitaxial layer comprises a first side adjacent the second spacer and a second side adjacent the third spacer,   wherein the second side of the second epitaxial layer comprises a second protrusion portion to overhang the top surface of the third spacer.   
     
     
         8 . The semiconductor structure of  claim 7 , wherein the first protrusion portion and the second protrusion portion point away from each other. 
     
     
         9 . The semiconductor structure of  claim 7 , further comprising:
 a dielectric layer disposed over the first epitaxial layer, the second spacer, and the second epitaxial layer.   
     
     
         10 . A semiconductor structure, comprising:
 a first fin structure and a second fin structure disposed over a substrate;   a first epitaxial layer disposed on the first fin structure; and   a second epitaxial layer disposed on the second fin structure,   wherein the first epitaxial layer comprises an outer side facing away from the second epitaxial layer and an inner side facing toward the second epitaxial layer,   wherein the second epitaxial layer comprises an outer side facing away from the first epitaxial layer and an inner side facing toward the first epitaxial layer,   wherein the outer side of the first epitaxial layer comprises a first protrusion portion extending laterally away from the second epitaxial layer,   wherein the outer side of the second epitaxial layer comprises a second protrusion portion extending laterally away from the first epitaxial layer,   wherein the inner sides of the first epitaxial layer and the second epitaxial layer extend perpendicular to the substrate.   
     
     
         11 . The semiconductor structure of  claim 10 , further comprising:
 a first outer spacer disposed along a portion of the outer side of the first epitaxial layer; and   a second outer spacer disposed along a portion of the outer side of the second epitaxial layer,   wherein the first protrusion portion extends directly over the first outer spacer,   wherein the second protrusion portion extends directly over the second outer spacer.   
     
     
         12 . The semiconductor structure of  claim 11 , further comprising:
 an isolation feature disposed over the substrate and between the first fin structure and the second fin structure.   
     
     
         13 . The semiconductor structure of  claim 12 , further comprising:
 an inner spacer extending continuously from the inner side of the first epitaxial layer, to a top surface of the isolation feature, and then the inner side the second epitaxial layer.   
     
     
         14 . The semiconductor structure of  claim 13 , wherein the first outer spacer, the second outer spacer, and the inner spacer comprise fluorine-doped silicon dioxide, carbon-doped silicon dioxide, porous silicon dioxide, porous carbon-doped silicon dioxide, spin-on organic polymeric dielectrics, spin-on silicon based polymeric dielectrics, or combinations thereof. 
     
     
         15 . The semiconductor structure of  claim 13 , wherein a top surface of the inner spacer is higher than a top surface of the first outer spacer or a top surface of the second outer spacer. 
     
     
         16 . The semiconductor structure of  claim 13 , wherein the first epitaxial layer and the second epitaxial layer are bounded by the inner spacer such that the first epitaxial layer and the second epitaxial layer do not extend over the inner spacer. 
     
     
         17 . The semiconductor structure of  claim 10 , wherein the first epitaxial layer and the second epitaxial layer comprise silicon germanium and a p-type dopant. 
     
     
         18 . A semiconductor structure, comprising:
 a first fin structure and a second fin structure disposed over a substrate;   an isolation feature disposed over the substrate and between the first fin structure and the second fin structure;   a first epitaxial layer disposed on the first fin structure, the first epitaxial layer comprising an outer side facing away from the second fin structure and an inner side facing toward the second fin structure;   a second epitaxial layer disposed on the second fin structure, the second epitaxial layer comprising an outer side facing away from the first epitaxial layer and an inner side facing toward the first epitaxial layer; and   an inner spacer extending continuously from the inner side of the first epitaxial layer, to a top surface of the isolation feature, and then the inner side the second epitaxial layer,   wherein the first epitaxial layer and the second epitaxial layer are bounded by the inner spacer such that the first epitaxial layer and the second epitaxial layer do not extend over the inner spacer.   
     
     
         19 . The semiconductor structure of  claim 18 , further comprising:
 a first outer spacer disposed along a portion of the outer side of the first epitaxial layer; and   a second outer spacer disposed along a portion of the outer side of the second epitaxial layer,   wherein the outer side of the first epitaxial layer comprises a first protrusion portion extending laterally away from the second epitaxial layer such that the first protrusion portion overhangs the first outer spacer,   wherein the outer side of the second epitaxial layer comprises a second protrusion portion extending laterally away from the first epitaxial layer such that the second protrusion portion overhangs the second outer spacer.   
     
     
         20 . The semiconductor structure of  claim 19 , wherein a top surface of the inner spacer is higher than a top surface of the first outer spacer or a top surface of the second outer spacer.