Semiconductor integrated circuit device

Abstract

A semiconductor integrated circuit device includes a flipflop circuit using vertical nanowire (VNW) FETs. A latch unit of the flipflop circuit includes: a feedback node; first p-type and n-type transistors each of which receives an input signal at one node and is connected to the feedback node at the other node; and second p-type and n-type transistors each connected to the feedback node at one node. In a standard cell, the tops of the first and second p-type and n-type transistors are connected to the feedback node.

What is claimed is: 
     
         1 . A semiconductor integrated circuit device comprising a standard cell, wherein
 the standard cell includes
 first, second, and third transistors of a first conductivity type that are vertical nanowire (VNW) FETs, and 
 a bottom region to which bottom electrodes of the first, second, and third transistors are connected in common, and 
   top electrodes of the first, second, and third transistors are electrically isolated from one another.   
     
     
         2 . The semiconductor integrated circuit device of  claim 2 , wherein
 the standard cell implements a flipflop circuit.