US2022328663A1PendingUtilityA1

Tunneling field effect transistors

Assignee: INTEL CORPPriority: Aug 18, 2017Filed: Jun 29, 2022Published: Oct 13, 2022
Est. expiryAug 18, 2037(~11.1 yrs left)· nominal 20-yr term from priority
B82Y 10/00H01L 29/0847H01L 29/66795H01L 29/66969H01L 29/66977H01L 29/785H01L 29/66522H10D 99/00H10D 62/151H10D 30/62H10D 30/024H10D 30/021H10D 30/6757H10D 12/211H10D 12/021H10D 30/6735H10D 64/27H10D 62/824H10D 62/121H10D 62/117H10D 62/141H10D 48/383
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Claims

Abstract

Disclosed herein are tunneling field effect transistors (TFETs), and related methods and computing devices. In some embodiments, a TFET may include: a first source/drain material having a p-type conductivity; a second source/drain material having an n-type conductivity; a channel material at least partially between the first source/drain material and the second source/drain material, wherein the channel material has a first side face and a second side face opposite the first side face; and a gate above the channel material, on the first side face, and on the second side face.

Claims

exact text as granted — not AI-modified
1 . An electronic component, comprising:
 a tunneling field effect transistor (TFET) comprising:
 a first semiconductor material having a p-type conductivity, the first semiconductor material having a top face over a substrate, the top face of the first semiconductor material a first distance from the substrate, 
 a second semiconductor material having an n-type conductivity, and 
 a channel material at least partially between the first semiconductor material and the second semiconductor material, wherein the channel material has a top face over the substrate, the top face of the channel material a second distance from the substrate, the first distance greater than the second distance. 
   
     
     
         2 . The electronic component of  claim 1 , further comprising a gate above the channel material. 
     
     
         3 . The electronic component of  claim 2 , wherein the gate is on a first side face of the first semiconductor material and a second side face of the second semiconductor material. 
     
     
         4 . The electronic component of  claim 1 , wherein the second semiconductor material has a top face over the substrate, the top face of the second semiconductor material a third distance from the substrate, and the third distance is greater than the second distance. 
     
     
         5 . The electronic component of  claim 4 , wherein the third distance is the same as the first distance. 
     
     
         6 . The electronic component of  claim 4 , wherein the third distance is greater than the first distance. 
     
     
         7 . The electronic component of  claim 1 , wherein the substrate includes crystalline silicon or crystalline germanium. 
     
     
         8 . The electronic component of  claim 1 , wherein a buffer material is on the substrate, and the first semiconductor material and the second semiconductor material are above the buffer material. 
     
     
         9 . The electronic component of  claim 8 , wherein the buffer material includes a group III-V material. 
     
     
         10 . The electronic component of  claim 8 , wherein the channel material is on the buffer material. 
     
     
         11 . The electronic component of  claim 1 , wherein a portion of the channel material is between the second semiconductor material and the substrate. 
     
     
         12 . The electronic component of  claim 11 , wherein the channel material is not present between the first semiconductor material and the substrate. 
     
     
         13 . A computing device, comprising:
 a die including a tunneling field effect transistor (TFET), wherein the TFET comprises:
 a first semiconductor material having a p-type conductivity, the first semiconductor material having a top face over a substrate, the top face of the first semiconductor material a first distance from the substrate, 
 a second semiconductor material having an n-type conductivity, and 
 a channel material at least partially between the first semiconductor material and the second semiconductor material, wherein the channel material has a top face over the substrate, the top face of the channel material a second distance from the substrate, the first distance greater than the second distance. 
   
     
     
         14 . The computing device of  claim 13 , wherein the computing device includes a power supply that provides a supply voltage that is less than 0.5 volts. 
     
     
         15 . The computing device of  claim 13 , wherein the TFET is included in a metallization stack of the die. 
     
     
         16 . The computing device of  claim 13 , further comprising a gate above the channel material. 
     
     
         17 . The computing device of  claim 16 , wherein the gate is on a first side face of the first semiconductor material and a second side face of the second semiconductor material. 
     
     
         18 . The computing device of  claim 13 , wherein the second semiconductor material has a top face over the substrate, the top face of the second semiconductor material a third distance from the substrate, and the third distance is greater than the second distance. 
     
     
         19 . The computing device of  claim 18 , wherein the third distance is the same as the first distance. 
     
     
         20 . The computing device of  claim 18 , wherein the third distance is greater than the first distance.

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