Method for forming fin field effect transistor (finfet) device structure with deep contact structure

Abstract

A method for forming a FinFET device structure and method for forming the same is provided. The method includes forming an isolation structure over a substrate and forming a first dielectric layer over the isolation structure. The method includes forming a gate structure in the first dielectric layer and forming a deep trench through the first dielectric layer and the isolation structure. The method also includes forming an S/D trench in the first dielectric layer and filling a metal material in the deep trench and the S/D trench to form a deep contact structure and the S/D contact structure. A bottom surface of the S/D contact structure is higher than a bottom surface of the deep contact structure.

What is claimed is: 
     
         1 . A method for forming a fin field effect transistor (FinFET) device structure, comprising:
 forming an isolation structure over a substrate;   forming a first dielectric layer over the isolation structure;   forming a first gate structure in the first dielectric layer;   forming a deep trench through the first dielectric layer and the isolation structure;   forming an S/D trench in the first dielectric layer; and   filling a metal material in the deep trench and the S/D trench to form a deep contact structure and the S/D contact structure, wherein a bottom surface of the S/D contact structure is higher than a bottom surface of the deep contact structure.   
     
     
         2 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 1 , further comprising:
 forming a metal silicide layer in the substrate before filling the metal material in the deep trench, wherein the metal silicide layer is in direct contact with the deep contact structure.   
     
     
         3 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 1 , further comprising:
 forming a doped region in the substrate before forming the metal silicide layer in the substrate, wherein the metal silicide layer is embedded in the doped region after forming the metal silicide layer in the substrate.   
     
     
         4 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 1 , further comprising:
 forming a fin structure over the substrate;   forming a source/drain (S/D) structure in the fin structure; and   forming the S/D contact structure over the S/D structure, wherein the S/D contact structure is electrically connected to the S/D structure.   
     
     
         5 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 1 , wherein the deep contact structure penetrates into and through the first dielectric layer and the isolation structure. 
     
     
         6 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 1 , further comprising:
 forming a middle contact structure between the deep contact structure and the S/D contact structure, wherein a bottom surface of the middle contact structure is higher than the bottom surface of the deep contact structure.   
     
     
         7 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 1 , further comprising:
 forming a second gate structure adjacent to the first gate structure, wherein the second gate structure has a step-shaped bottom surface.   
     
     
         8 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 7 , wherein the second gate structure comprises a gate dielectric layer, and a portion of the gate dielectric layer is in direct contact with a top surface of the isolation structure. 
     
     
         9 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 1 , further comprising:
 forming an etching stop layer over the first dielectric layer; and   forming a second dielectric layer over the etching stop layer, wherein the deep trench and the S/D trench penetrates into and through the etching stop layer and the second dielectric layer.   
     
     
         10 . A method for forming a fin field effect transistor (FinFET) device structure, comprising:
 forming an isolation structure over a substrate;   forming a first dielectric layer over the isolation structure;   forming a gate structure in the first dielectric layer;   forming a first trench in the first dielectric layer, wherein the first trench has a first depth;   forming a second trench through the first dielectric layer and the isolation structure, wherein the second trench has a second depth, and the second depth is greater than the first depth;   forming a first doped region below the first trench;   forming a second doped region below the second trench;   forming a first contact structure in the first trench; and   forming a deep contact structure in the second trench, wherein a bottom surface of the deep contact structure is lower than a bottom surface of the gate structure.   
     
     
         11 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 10 , further comprising:
 forming a metal silicide layer in the second doped region.   
     
     
         12 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 10 , further comprising:
 forming a second dielectric layer over the first dielectric layer;   forming an etching stop layer over the second dielectric layer; and   forming a third dielectric layer over the etching stop layer, wherein the first trench and the second trench penetrates into and through the second dielectric layer.   
     
     
         13 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 12 , further comprising:
 forming a first opening through the etching stop layer and the third dielectric layer, wherein the second dielectric layer is exposed by the first opening;   forming a second opening through the third dielectric layer, the etching stop layer and the second dielectric layer;   enlarging the first opening to form the first trench; and   enlarging the second opening to form the second trench.   
     
     
         14 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 13 , wherein the first dielectric layer is exposed by the second opening. 
     
     
         15 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 10 , further comprising:
 forming a fin structure over the substrate;   forming a source/drain (S/D) structure in the fin structure; and   forming the first contact structure over the S/D structure, wherein the first contact structure is electrically connected to the S/D structure.   
     
     
         16 . A method for forming a fin field effect transistor (FinFET) device structure, comprising:
 forming an isolation structure over a substrate;   forming a first dielectric layer over the isolation structure;   forming a first gate structure in the first dielectric layer;   forming a S/D structure adjacent to the first gate structure;   forming a first trench in the first dielectric layer, wherein the S/D structure is exposed by the first trench;   forming a second trench through the first dielectric layer, wherein the first dielectric layer is exposed by the second trench;   forming a third trench through the first dielectric layer and the isolation structure, wherein a top surface of the substrate is exposed by the third trench;   forming a S/D contact structure in the first trench;   forming a middle contact structure in the second trench; and   forming a deep contact structure in the third trench.   
     
     
         17 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 16 , further comprising:
 forming a doped region below the third trench; and   forming a metal silicide layer in the doped region.   
     
     
         18 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 16 , further comprising:
 forming a second gate structure adjacent to the first gate structure, wherein the second gate structure has a step-shaped bottom surface.   
     
     
         19 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 18 , wherein the second gate structure comprises a gate dielectric layer, and a portion of the gate dielectric layer is in direct contact with a top surface of the isolation structure. 
     
     
         20 . The method for forming the fin field effect transistor (FinFET) device structure as claimed in  claim 16 , wherein the deep contact structure penetrates into and through the first dielectric layer and the isolation structure.