Solid-state imaging device, solid-state imaging device manufacturing method, and electronic device

Abstract

A solid-state imaging device includes: a first photodiode made up of a first first-electroconductive-type semiconductor region formed on a first principal face side of a semiconductor substrate, and a first second-electroconductive-type semiconductor region formed within the semiconductor substrate adjacent to the first first-electroconductive-type semiconductor region; a second photodiode made up of a second first-electroconductive-type semiconductor region formed on a second principal face side of the semiconductor substrate, and a second second-electroconductive-type semiconductor region formed within the semiconductor substrate adjacent to the second first-electroconductive-type semiconductor region; and a gate electrode formed on the first principal face side of the semiconductor substrate; with impurity concentration of a connection face between the second first-electroconductive-type semiconductor region and the second second-electroconductive-type semiconductor region being equal to or greater than impurity concentration of a connection face of an opposite layer of the second first-electroconductive-type semiconductor region of the second second-electroconductive-type semiconductor region.

What is claimed is: 
     
         1 . A solid-state imaging device including: a readout gate embedded within a trench formed in a semiconductor substrate via a gate insulating film; a photoelectric conversion region provided within the semiconductor substrate; a floating diffusion provided on the surface layer of the semiconductor substrate while keeping an interval with the photoelectric conversion region; and a potential adjustment region disposed adjacent to the photoelectric conversion region and the gate insulating film, which is the same electroconductive type as the semiconductor substrate and the photoelectric conversion region, and also is an impurity region of which the electroconductive-type concentration is lower than those of this semiconductor substrate and this photoelectric conversion region. 
     
     
         2 . The solid-state imaging device according to  claim 1 , wherein the potential adjustment region is provided in the same depth position as with the photoelectric conversion region. 
     
     
         3 . The solid-state imaging device according to  claim 1 , wherein a plurality of the photoelectric conversion regions are disposed by being laminated in the depth direction within the semiconductor substrate; and wherein the potential adjustment region is provided adjacent to a photoelectric conversion region positioned farthest from the floating diffusion of the plurality of the photoelectric conversion regions. 
     
     
         4 . The solid-state imaging device according to  claim 3 , wherein of a plurality of the photoelectric conversion regions, a photoelectric conversion region provided adjacent to the potential adjustment region is a photoelectric conversion region for red light. 
     
     
         5 . The solid-state imaging device according to  claim 1 , wherein the readout gate is disposed within a trench provided by passing through the semiconductor substrate. 
     
     
         6 . The solid-state imaging device according to  claim 1 , wherein the floating diffusion is disposed on the light receiving face side as to the photoelectric conversion region in the semiconductor substrate. 
     
     
         7 . The solid-state imaging device according to  claim 1 , wherein the semiconductor substrate is configured of the same electroconductive type as the photoelectric conversion region and the floating diffusion. 
     
     
         8 . The solid-state imaging device according to  claim 1 , wherein a pinning region having the opposite electroconductive type of the photoelectric conversion region is provided within the semiconductor substrate along the side wall of the trench; and wherein an overlapped region where the potential adjustment region and the pinning region are overlapped includes an impurity making up this potential adjustment region and an impurity making up this pinning region together. 
     
     
         9 . The solid-state imaging device according to  claim 8 , wherein a portion of the potential adjustment region is disposed overlapped with the pinning region. 
     
     
         10 . A solid-state imaging device manufacturing method including: introducing an impurity into a semiconductor substrate, thereby forming a photoelectric conversion region within this semiconductor substrate, and also forming a potential adjustment region adjacent to this photoelectric conversion region, which is the same electroconductive-type as this semiconductor substrate and this photoelectric conversion region, and also the electroconductive-type concentration is lower than those of this semiconductor substrate and this photoelectric conversion region; forming a trench adjacent to the potential adjustment region in the semiconductor substrate; forming a readout gate within the trench via a gate insulating film; and guiding an impurity into the surface layer of the semiconductor substrate, thereby forming a floating diffusion in proximity to the readout gate on the surface layer of the semiconductor substrate. 
     
     
         11 . The solid-state imaging device manufacturing method according to  claim 10 , wherein the trench is formed by passing through the semiconductor substrate. 
     
     
         12 . The solid-state imaging device manufacturing method according to  claim 10 , further including: introducing an impurity into the semiconductor substrate from the inner wall of the trench after forming the trench before forming the gate insulating film and the readout gate, thereby forming a pinning region having the opposite electroconductive type of the photoelectric conversion region along the inner wall of this trench. 
     
     
         13 . The solid-state imaging device manufacturing method according to  claim 12 , wherein, with formation of the pinning region, this pinning region is overlapped with a portion of the potential adjustment region. 
     
     
         14 . An electronic device including: a readout gate embedded within a trench formed in a semiconductor substrate via a gate insulating film; a photoelectric conversion region provided within the semiconductor substrate; a floating diffusion provided on the surface layer of the semiconductor substrate while keeping an interval with the photoelectric conversion region; a potential adjustment region disposed adjacent to the photoelectric conversion region and the gate insulating film, which is the same electroconductive type as the semiconductor substrate and the photoelectric conversion region, and also is an impurity region of which the electroconductive-type concentration is lower than this semiconductor substrate and this photoelectric conversion region; and an optical system configured to guide incident light into the photoelectric conversion region.