Manufacturing method of semiconductor structure having dielectric layer edge covering circuit carrier

Abstract

A manufacturing method of a semiconductor structure includes at least the following steps. An encapsulated semiconductor die is disposed on a first surface of a circuit carrier to be in electrical contact with the circuit carrier. A second surface of the circuit carrier and an edge of the circuit carrier is protected with a patterned dielectric layer, where the second surface of the circuit carrier is opposite to the first surface, and the edge of the circuit carrier is connected to the second surface. A conductive terminal is formed to penetrate through the patterned dielectric layer to be in electrical contact with the circuit carrier.

What is claimed is: 
     
         1 . A manufacturing method of a semiconductor structure, comprising:
 disposing an encapsulated semiconductor die on a first surface of a circuit carrier to be in electrical contact with the circuit carrier;   protecting a second surface of the circuit carrier and an edge of the circuit carrier with a patterned dielectric layer, wherein the second surface of the circuit carrier is opposite to the first surface, and the edge of the circuit carrier is connected to the second surface; and   forming a conductive terminal penetrating through the patterned dielectric layer to be in electrical contact with the circuit carrier.   
     
     
         2 . The manufacturing method as claimed in  claim 1 , wherein before protecting the second surface and the edge of the circuit carrier with the patterned dielectric layer,
 recessing a substrate of the circuit carrier to have a conductive via of the circuit carrier protruded from a thinned second surface of the circuit carrier, and   forming an isolation layer on the thinned second surface of the circuit carrier, wherein at least a portion of the conductive via is accessibly revealed by the isolation layer.   
     
     
         3 . The manufacturing method as claimed in  claim 1 , wherein protecting the second surface and the edge of the circuit carrier with the patterned dielectric layer comprises:
 forming the patterned dielectric layer on the second surface of the circuit carrier and extending across the edge of the circuit carrier and beyond a sidewall of the circuit carrier connected to the first surface of the circuit carrier.   
     
     
         4 . The manufacturing method as claimed in  claim 3 , further comprising:
 leveling a sidewall of the patterned dielectric layer and a sidewall of the encapsulated semiconductor die.   
     
     
         5 . The manufacturing method as claimed in  claim 1 , wherein the edge of the circuit carrier is formed as a beveled edge before forming the patterned dielectric layer. 
     
     
         6 . The manufacturing method as claimed in  claim 5 , wherein protecting the second surface and the edge of the circuit carrier with the patterned dielectric layer comprises:
 forming a dielectric material on the second surface and the beveled edge of the circuit carrier; and   removing a portion of the dielectric material on the beveled edge, so that the patterned dielectric layer partially covers the beveled edge of the circuit carrier.   
     
     
         7 . A manufacturing method of a semiconductor structure, comprising:
 encapsulating a plurality of semiconductor dies on a circuit substrate with an insulating encapsulation;   cutting the circuit substrate to form a plurality of circuit carriers with diced sidewalls;   forming a patterned dielectric layer on the circuit carriers opposite to the insulating encapsulation, wherein a portion of the patterned dielectric layer extends to cover the diced sidewalls of the circuit carriers;   forming a plurality of conductive terminals on the patterned dielectric layer to be electrically coupled to the semiconductor dies through the circuit carriers; and   performing a singulation process to at least cut through the insulating encapsulation.   
     
     
         8 . The manufacturing method as claimed in  claim 7 , wherein
 when cutting the circuit substrate to form the circuit carriers, the circuit substrate is cut through to form a gap between the adjacent circuit carriers;   after forming the patterned dielectric layer, the portion of the patterned dielectric layer is formed in the gap between the adjacent circuit carriers; and   the singulation process comprises cutting through the portion of the patterned dielectric layer and the underlying insulating encapsulation.   
     
     
         9 . The manufacturing method as claimed in  claim 7 , wherein
 cutting the circuit substrate comprises forming a groove on a surface of the circuit substrate opposite to the insulating encapsulation; and   after forming the patterned dielectric layer, the portion of the patterned dielectric layer is formed in the groove; and   the singulation process comprises cutting within the groove.   
     
     
         10 . The manufacturing method as claimed in  claim 9 , wherein the patterned dielectric layer is formed with a recess corresponding to the groove, and the recess is formed smaller than the groove. 
     
     
         11 . The manufacturing method as claimed in  claim 10 , wherein when performing the singulation process, the circuit substrate is cut corresponding to the recess of the patterned dielectric layer, so that after performing the singulation process, a portion of the patterned dielectric layer is remained on the groove. 
     
     
         12 . The manufacturing method as claimed in  claim 9 , wherein a first dielectric material of the patterned dielectric layer is formed on the circuit substrate, and then a portion of the first dielectric material of the patterned dielectric layer and the underlying circuit substrate are removed to form the groove. 
     
     
         13 . The manufacturing method as claimed in  claim 7 , further comprising:
 forming a redistribution circuitry in the patterned dielectric layer to reroute an electrical path of the circuit carriers before forming the conductive terminals.   
     
     
         14 . A manufacturing method of a semiconductor structure, comprising:
 encapsulating a semiconductor die on a circuit substrate with an insulating encapsulation;   cutting the circuit substrate to form a circuit carrier, wherein the circuit carrier comprising a first surface coupled to the insulating encapsulation and the semiconductor die, a second surface opposite to the first surface, a sidewall connected to the first surface and the second surface, and an edge between the second surface and the sidewall;   forming a dielectric layer on the second surface circuit carrier and extending to at least cover the edge of the circuit carrier; and   forming a conductive terminal on the dielectric layer, wherein the conductive terminal is partially embedded in the dielectric layer to be in contact with the circuit carrier, and the semiconductor die being electrically coupled to the conductive terminal through the circuit carrier.   
     
     
         15 . The manufacturing method as claimed in  claim 14 , further comprising:
 forming an isolation layer on the second surface of the circuit carrier before forming the dielectric layer, wherein the dielectric layer is formed on the isolation layer, and a material of the isolation layer is different from that of the dielectric layer.   
     
     
         16 . The manufacturing method as claimed in  claim 14 , wherein forming the dielectric layer comprising:
 extending the dielectric layer beyond the edge of the circuit carrier and along the sidewall of the circuit carrier to be in contact with the insulating encapsulation.   
     
     
         17 . The manufacturing method as claimed in  claim 16 , wherein when cutting the circuit substrate, a portion of the insulating encapsulation is also removed, so that an interface between the dielectric layer and the insulating encapsulation is between the first surface of the circuit carrier and a surface of the insulating encapsulation opposite to the first surface of the circuit carrier. 
     
     
         18 . The manufacturing method as claimed in  claim 14 , wherein cutting the circuit substrate comprises:
 performing a bevel cutting process on the circuit substrate, wherein the edge of the circuit carrier is a bevel cut, and after the dielectric layer is formed, the dielectric layer extends beyond the second surface of the circuit carrier to partially cover the bevel cut.   
     
     
         19 . The manufacturing method as claimed in  claim 14 , wherein cutting the circuit substrate comprises:
 performing a bevel cutting process on the circuit substrate, wherein the edge of the circuit carrier is a bevel cut, and after the dielectric layer is formed, the dielectric layer extends to cover the edge of the circuit carrier, and a sidewall of the dielectric layer is substantially leveled with the sidewall of the circuit carrier.   
     
     
         20 . The manufacturing method as claimed in  claim 14 , further comprising:
 forming a redistribution circuitry on the circuit carrier and in the dielectric layer before forming the conductive terminal, wherein after the conductive terminal is formed, the conductive terminal is electrically coupled to the circuit carrier through the redistribution layer.