Method for driving semiconductor device

Abstract

To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period.

1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a transistor;   a first switch;   a second switch;   a capacitor; and   a display element,   wherein a first terminal of the first switch is electrically connected to a gate of the transistor,   wherein a second terminal of the first switch is electrically connected to a source signal line,   wherein a first terminal of the second switch is electrically connected to one of a source and a drain of the transistor,   wherein a first terminal of the capacitor is electrically connected to the gate of the transistor,   wherein a second terminal of the capacitor is electrically connected to the one of the source and the drain of the transistor,   wherein the one of the source and the drain of the transistor is electrically connected to the display element,   wherein the transistor comprises a semiconductor layer having a first region, a second region, a third region, a fourth region, and a channel-formation region,   wherein the channel-formation region is provided between the first region and the second region,   wherein the first region is provided between the third region and the channel-formation region,   wherein the second region is provided between the fourth region and the channel-formation region,   wherein a first insulating layer is provided over the semiconductor layer,   wherein a first conductive layer is provided over the first insulating layer and overlaps with the channel-formation region,   wherein a second insulating layer is provided over the first conductive layer,   wherein a second conductive layer is provided over the second insulating layer,   wherein the second conductive layer has a region in contact with the third region or the fourth region via a first opening in the second insulating layer,   wherein a third insulating layer comprising an organic material is provided over the second conductive layer,   wherein a third conductive layer is provided over the third insulating layer,   wherein the third conductive layer has a region in contact with the second conductive layer via a second opening in the third insulating layer,   wherein the second opening has a region not overlapping with the first opening,   wherein the second insulating layer has a region in contact with a side surface of the first conductive layer,   wherein each of the first insulating layer and the second insulating layer comprises silicon oxide,   wherein the semiconductor layer comprises an oxide semiconductor,   wherein the second conductive layer has a stacked structure of a first layer comprising molybdenum or titanium and a second layer comprising copper,   wherein the third conductive layer comprises indium tin oxide or indium zinc oxide, and   wherein the capacitor comprises an oxide semiconductor layer.   
     
     
         3 . A semiconductor device comprising:
 a transistor;   a first switch;   a second switch;   a capacitor; and   a display element,   wherein a first terminal of the first switch is electrically connected to a gate of the transistor,   wherein a second terminal of the first switch is electrically connected to a source signal line,   wherein a first terminal of the second switch is electrically connected to one of a source and a drain of the transistor,   wherein a first terminal of the capacitor is electrically connected to the gate of the transistor,   wherein a second terminal of the capacitor is electrically connected to the one of the source and the drain of the transistor,   wherein the one of the source and the drain of the transistor is electrically connected to the display element,   wherein the transistor comprises a semiconductor layer having a first region, a second region, a third region, a fourth region, and a channel-formation region,   wherein the channel-formation region is provided between the first region and the second region,   wherein the first region is provided between the third region and the channel-formation region,   wherein the second region is provided between the fourth region and the channel-formation region,   wherein a first insulating layer is provided over the semiconductor layer,   wherein a first conductive layer is provided over the first insulating layer and overlaps with the channel-formation region,   wherein a second insulating layer is provided over the first conductive layer,   wherein a second conductive layer is provided over the second insulating layer,   wherein the second conductive layer has a region in contact with the third region or the fourth region via a first opening in the second insulating layer,   wherein a third insulating layer comprising an organic material is provided over the second conductive layer,   wherein a third conductive layer is provided over the third insulating layer,   wherein the third conductive layer has a region in contact with the second conductive layer via a second opening in the third insulating layer,   wherein the second opening has a region not overlapping with the first opening,   wherein the second insulating layer has a region in contact with a side surface of the first conductive layer,   wherein each of the first insulating layer and the second insulating layer comprises silicon oxide,   wherein the semiconductor layer comprises a nanocrystal,   wherein the second conductive layer has a stacked structure of a first layer comprising molybdenum or titanium and a second layer comprising copper,   wherein the third conductive layer comprises indium tin oxide or indium zinc oxide, and   wherein the capacitor comprises an oxide semiconductor layer.   
     
     
         4 . A semiconductor device comprising:
 a transistor;   a first switch;   a second switch;   a capacitor; and   a display element,   wherein a first terminal of the first switch is electrically connected to a gate of the transistor,   wherein a second terminal of the first switch is electrically connected to a source signal line,   wherein a first terminal of the second switch is electrically connected to one of a source and a drain of the transistor,   wherein a first terminal of the capacitor is electrically connected to the gate of the transistor,   wherein a second terminal of the capacitor is electrically connected to the one of the source and the drain of the transistor,   wherein the one of the source and the drain of the transistor is electrically connected to the display element,   wherein the transistor comprises a semiconductor layer having a first region, a second region, a third region, a fourth region, and a channel-formation region,   wherein the channel-formation region is provided between the first region and the second region,   wherein the first region is provided between the third region and the channel-formation region,   wherein the second region is provided between the fourth region and the channel-formation region,   wherein a first insulating layer is provided over the semiconductor layer,   wherein a first conductive layer is provided over the first insulating layer and overlaps with the channel-formation region,   wherein a second insulating layer is provided over the first conductive layer,   wherein a second conductive layer is provided over the second insulating layer,   wherein the second conductive layer has a region in contact with the third region or the fourth region via a first opening in the second insulating layer,   wherein a third insulating layer comprising an organic material is provided over the second conductive layer,   wherein a third conductive layer is provided over the third insulating layer,   wherein the third conductive layer has a region in contact with the second conductive layer via a second opening in the third insulating layer,   wherein the second opening has a region not overlapping with the first opening,   wherein the second insulating layer has a region in contact with a side surface of the first conductive layer,   wherein each of the first insulating layer and the second insulating layer comprises silicon oxide,   wherein the semiconductor layer comprises a nanocrystal,   wherein the second conductive layer has a stacked structure of a first layer comprising molybdenum or titanium and a second layer comprising copper,   wherein the third conductive layer comprises indium tin oxide or indium zinc oxide,   wherein the capacitor comprises a fourth conductive layer, a fifth conductive layer, a sixth conductive layer, and an oxide semiconductor layer,   wherein the fifth conductive layer has a region overlapping with the sixth conductive layer,   wherein the fourth conductive layer has a region overlapping the sixth conductive layer, and   wherein the oxide semiconductor layer has a region overlapping each of the fourth conductive layer, the fifth conductive layer, and the sixth conductive layer.