US2022301968A1PendingUtilityA1

Semiconductor apparatus

Assignee: TEKNOLOGIAN TUTKIMUSKESKUS VTT OYPriority: May 29, 2017Filed: Jun 8, 2022Published: Sep 22, 2022
Est. expiryMay 29, 2037(~10.8 yrs left)· nominal 20-yr term from priority
H10P 14/69391H10P 14/6339H10P 14/6336H10W 74/43H10W 74/137H10D 86/85H01L 28/10H01L 21/02178H01L 28/20H01L 23/291H01L 23/3171H01L 28/60H10D 1/692H10D 1/47H10D 1/20H10W 10/011
54
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor apparatus having a silicon substrate layer at least portion of which is doped with dopants of a conductivity type; and at least one insulator layer formed above the silicon substrate layer, wherein the at least one insulator layer and the dopants of the silicon substrate layer have opposite electric charges.

Claims

exact text as granted — not AI-modified
1 . A semiconductor apparatus comprising:
 a surface passivated silicon substrate layer at least a portion of which is doped with dopants of a conductivity type;   an integrated passive device;   a first insulator layer formed above the silicon substrate layer; wherein the first insulator layer and the dopants of the silicon substrate layer have opposite electric charges, wherein a static charge of the first insulator layer causes forming of a depletion region at an interface between the at least one insulator layer and the silicon substrate layer, and wherein the first insulator layer has thickness that is determined based on the static charge of the first insulator layer and properties of the silicon substrate layer; and   at least one pad or connecting layer.   
     
     
         2 . A semiconductor apparatus of  claim 1 , wherein the integrated passive device comprises a capacitor, an inductor, a balun, a filter, a matching network, an antenna, an antenna arrays, or a feed network. 
     
     
         3 . A semiconductor apparatus of  claim 1 , wherein the at least one pad or connecting layer comprises at least one metal layer for electrically coupling to the integrated passive device. 
     
     
         4 . A semiconductor apparatus of  claim 1 , wherein the integrated passive device comprises a multi metal layer. 
     
     
         5 . A semiconductor apparatus of  claim 1 , further comprising: a first metal layer, wherein the first insulator layer is arranged between the silicon substrate layer and the first metal layer. 
     
     
         6 . A semiconductor apparatus of  claim 1 , further comprising: a second insulator layer and a second metal layer, wherein the second insulator layer is arranged between the first metal layer and the second metal layer, and the second metal layer is arranged above the first metal layer. 
     
     
         7 . A semiconductor apparatus of  claim 1 , wherein at least one of the first insulator layer and the second insulator layer comprises an Atomic Layer Deposition (ALD) grown aluminum oxide layer, an Atomic Layer Deposition (ALD) grown aluminum nitride layer, or a plasma enhanced chemical vapor deposition (PECVD) oxide or nitride layer.

Join the waitlist — get patent alerts

Track US2022301968A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.