Bipolar pulsed-voltage gate driver

Abstract

A gate driver circuit comprises a gate-driver assembly, a transformer, first and second circuit voltage outputs, first and second switching devices, and a controller. The gate-driver assembly comprises a first and second voltage inputs and a first and second voltage outputs coupled to a primary winding of the transformer. The first and second switching devices are coupled to the secondary winding and respectively coupled to the first and second circuit voltage outputs. The controller is configured to cause the first circuit voltage output to supply a positive output voltage by supplying a higher first input voltage to the first voltage input than to the second voltage input and is also configured to cause the first circuit voltage output to supply a negative output voltage by supplying a higher second input voltage to the second voltage input than to the first voltage input.

1 . (canceled) 
     
     
         2 . A gate driver circuit comprising:
 a transformer comprising a secondary winding having a high-side terminal and a low-side terminal;   a first voltage output;   a first switching device comprising:
 a first terminal coupled with the high-side terminal; 
 a second terminal coupled with the first voltage output; and 
 a third terminal; 
   a second voltage output;   a second switching device comprising:
 a first terminal coupled with the low-side terminal and the third terminal of the first switching device; 
 a second terminal coupled with the second voltage output; and 
 a third terminal coupled with the first terminal of the first switching device and with the high-side terminal; and 
   wherein the third terminal of the first switching device is coupled with the first terminal of the second switching device and with the low-side terminal.   
     
     
         3 . The gate driver circuit of  claim 2 , wherein:
 the first switching device comprises a metal oxide semiconductor field-effect transistor (MOSFET);   the first terminal of the first switching device comprises a source;   the second terminal of the first switching device comprises a drain;   the third terminal of the first switching device comprises a gate;   the second switching device comprises a MOSFET;   the first terminal of the second switching device comprises a source;   the second terminal of the second switching device comprises a drain; and   the third terminal of the second switching device comprises a gate.   
     
     
         4 . The gate driver circuit of  claim 2  further comprising a first voltage input and a second voltage input;
 wherein the first voltage output is configured to provide a first output voltage based on a first input voltage supplied to the first voltage input; and 
 wherein the second voltage output configured to provide a second output voltage based on a second input voltage supplied to the second voltage input. 
 
     
     
         5 . The gate driver circuit of  claim 4  further comprising a controller configured to:
 cause the first voltage output to supply a positive output voltage with respect to an output voltage supplied by the second voltage output by supplying a higher first input voltage to the first voltage input than the second input voltage supplied to the second voltage input; and 
 cause the first voltage output to supply a negative output voltage with respect to the output voltage supplied by the second voltage output by supplying a higher second input voltage to the second voltage input than the first input voltage supplied to the first voltage input. 
 
     
     
         6 . The gate driver circuit of  claim 5 , wherein supplying the higher first input voltage causes the second switching device to turn on. 
     
     
         7 . The gate driver circuit of  claim 6 , wherein the controller is further configured to cause the second switching device to turn off by supplying the second input voltage at a voltage substantially matching the first input voltage while a portion of the first input voltage is being supplied to the first voltage input. 
     
     
         8 . The gate driver circuit of  claim 7 , wherein supplying the higher second input voltage causes the first switching device to turn on. 
     
     
         9 . The gate driver circuit of  claim 8 , wherein the controller is further configured to cause the first switching device to turn off by supplying the first input voltage at a voltage substantially matching the second input voltage while a portion of the second input voltage is being supplied to the second voltage input. 
     
     
         10 . The gate driver circuit of  claim 5 , wherein the controller is further configured to vary a time interval between the positive output voltage and the negative output voltage to control a pulse-width modulation (PWM) output of a load switching device coupled to the first voltage output and to the second voltage output. 
     
     
         11 . The gate driver circuit of  claim 2 , wherein the transformer further comprises a primary winding; and
 wherein the gate driver circuit further comprises a dual gate-driver assembly coupled between the primary winding and the first and second voltage inputs.   
     
     
         12 . The gate driver circuit of  claim 11 , wherein the dual gate-driver assembly comprises a dual gate-driver integrated circuit (IC). 
     
     
         13 . A method comprising:
 applying a voltage differential across first and second inputs of a gate-driver assembly to cause a positive current to flow through a primary winding of a transformer from a first output of the gate-driver assembly to a second output of the gate-driver assembly;   in response to the positive current flowing through the primary winding:
 causing a positive inductive current to flow through a secondary winding of the transformer; and 
 causing a pair of switches coupled to the secondary winding to provide a positive output voltage to a switching device, the switching device configured to turn on in response to the positive output voltage; and 
   applying a common voltage across the first and second inputs after a first delay to reduce the positive current flow through the primary winding.   
     
     
         14 . The method of  claim 13  further comprising causing the pair of switches to halt providing the positive output voltage to the switching device in response to reducing the positive current flow through the primary winding. 
     
     
         15 . The method of  claim 13 , wherein applying the voltage differential across the first and second inputs comprises:
 applying a first voltage to the first input; and   applying a second voltage to the second input, the first voltage higher than the second voltage.   
     
     
         16 . The method of  claim 15 , wherein applying the first voltage to the second input comprises applying the first voltage to the second input while simultaneously applying the first voltage to the first input. 
     
     
         17 . The method of  claim 16 , wherein applying the second voltage to the second input after the first delay comprises applying the second voltage to the second input after the first delay to eliminate the positive current flow. 
     
     
         18 . The method of  claim 13  further comprising:
 applying a second voltage differential across the first and second inputs of the gate-driver assembly to cause a negative current to flow through the primary winding from the second output of the gate-driver assembly to the first output of the gate-driver assembly; 
 in response to the negative current flowing through the primary winding:
 causing a negative inductive current to flow through the secondary winding; and 
 causing the pair of switches coupled to the secondary winding to provide a negative output voltage to the switching device, the switching device configured to turn off in response to the negative output voltage. 
 
 
     
     
         19 . The method of  claim 18 , wherein applying the second voltage differential across the first and second inputs comprises
 applying a first voltage to the second input; and   applying a second voltage to the first input, the first voltage higher than the second voltage.   
     
     
         20 . The method of  claim 19  further comprising:
 applying the second voltage to the second input after a second delay to reduce the negative current flow through the primary winding while applying the first voltage to the second input; and 
 in response to reducing the negative current flow through the primary winding, cause the pair of switches to halt providing the negative output voltage to the switching device. 
 
     
     
         21 . The method of  claim 20  further comprising controlling a duty cycle of the switching device by varying a third delay between application of the first voltage to the second input after the first delay and application of the second voltage to the first input.