US2022285241A1PendingUtilityA1
Method of forming semiconductor packages having thermal through vias (ttv)
Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: May 30, 2018Filed: May 23, 2022Published: Sep 8, 2022
Est. expiryMay 30, 2038(~11.8 yrs left)· nominal 20-yr term from priority
H10W 90/288H10W 70/099H10W 72/073H10W 72/874H10W 72/9413H10W 44/248H10W 90/00H10W 70/09H10W 90/10H10W 70/60H10W 72/241H10W 90/734H10W 90/736H10W 70/655H10W 72/30H10W 72/20H10W 70/635H10W 70/611H10W 42/121H10W 20/089H10W 20/42H10W 44/20H10W 70/614H10W 90/701H10W 74/117H10W 40/228H10P 72/744H10P 72/7424H10W 40/22H10P 72/74H01L 2224/2101H01L 2224/2201H01L 24/32H01L 2224/25171H01L 23/562H01L 23/367H01L 2224/20H01L 2224/211H01L 2924/15172H01L 21/76816H01L 24/17H01L 24/24H01L 2924/15173H01L 24/18H01L 23/5384H01L 2224/221H01L 24/25H01L 24/23H01L 2224/18H01L 23/5226H01L 2224/02379H01L 2224/21H01L 2224/22H01L 24/20
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Claims
Abstract
A method of forming a semiconductor package includes the following steps. A redistribution layer structure is formed over a first die and a dummy die, wherein the redistribution layer structure is directly electrically connected to the first die. An insulating layer is formed, wherein the insulating layer is disposed opposite to the redistribution layer structure with respect to the first die. At least one thermal through via is formed in the insulating layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of forming a semiconductor package, comprising:
forming a redistribution layer structure over a first die and a dummy die, wherein the redistribution layer structure is directly electrically connected to the first die; forming an insulating layer, wherein the insulating layer is disposed opposite to the redistribution layer structure with respect to the first die; and forming at least one thermal through via in the insulating layer.
2 . The method as claimed in claim 1 , wherein the dummy die is electrically connected to the first die through the redistribution layer structure.
3 . The method as claimed in claim 1 , further comprising forming at least one through via aside the first die between the redistribution layer structure and the at least one thermal through via.
4 . The method as claimed in claim 1 , further comprising forming connectors over the redistribution layer structure.
5 . The method as claimed in claim 4 , wherein the first die is disposed in a first region, the dummy die is disposed in a second region, a density of the connectors in the first region is equal to the number of the connectors in the first region divided by an area of the first region, a density of the connectors in the second region is equal to the number of the connectors in the second region divided by an area of the second region, and the density of the connectors in the second region is larger than the density of the connectors in the first region.
6 . The method as claimed in claim 1 , further comprising forming other redistribution layer structure between the insulating layer and the first die and the dummy die, wherein the at least one thermal through via is electrically connected to the redistribution layer structure through the other redistribution layer structure.
7 . The method as claimed in claim 1 , wherein the first die is disposed in a first region, the dummy die is disposed in a second region, a density of the at least one thermal through via in the first region is equal to the number of the at least one thermal through via in the first region divided by an area of the first region, a density of the at least one thermal through via in the second region is equal to the number of the at least one thermal through via in the second region divided by an area of the second region, and the density of the at least one thermal through via in the first region is larger than the density of the at least one thermal through via in the second region.
8 . A method of forming a semiconductor package, comprising:
forming a first die over a conductive paste; and forming at least one thermal through via over a first die, wherein the conductive paste is disposed between the first die and the at least one thermal through via, and the at least one thermal through via is electrically connected to the first die through the conductive paste.
9 . The method as claimed in claim 8 , wherein the conductive paste is in direct contact with the first die.
10 . The method as claimed in claim 8 , further comprising forming a dummy die aside the first die.
11 . The method as claimed in claim 10 , wherein the conductive paste is further in direct contact with the dummy die.
12 . The method as claimed in claim 8 , further comprising forming a redistribution layer structure electrically connected to the first die, wherein the redistribution layer structure and the at least one thermal through via are disposed at opposite sides of the first die.
13 . The method as claimed in claim 12 , wherein further comprising forming a plurality of connectors, wherein the redistribution layer structure is disposed between the connectors and the first die.
14 . The method as claimed in claim 8 , further comprising forming an insulating layer surrounding the at least one thermal through via.
15 . A method of forming a semiconductor package, comprising:
forming at least one first through via in an encapsulant; forming a redistribution layer structure over the at least one first through via; and forming at least one thermal through via over the redistribution layer structure and the encapsulant, wherein the redistribution layer structure is electrically connected to the at least one first through via and the at least one thermal through via.
16 . The method as claimed in claim 15 , further comprising forming a die aside the at least one first through via in the encapsulant, wherein the at least one thermal through via is electrically connected to the die through the at least one first through via.
17 . The method as claimed in claim 16 , further comprising forming a die attach film between the die and the at least one thermal through via.
18 . The method as claimed in claim 16 , further comprising forming a conductive paste between the die and the redistribution layer structure.
19 . The method as claimed in claim 18 , wherein the conductive paste is in direct contact with the die and the redistribution layer structure.
20 . The method as claimed in claim 15 , wherein surfaces of the at least one first through via and the encapsulant are substantially coplanar.Join the waitlist — get patent alerts
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