Dielets on flexible and stretchable packaging for microelectronics
Abstract
Dielets on flexible and stretchable packaging for microelectronics are provided. Configurations of flexible, stretchable, and twistable microelectronic packages are achieved by rendering chip layouts, including processors and memories, in distributed collections of dielets implemented on flexible and/or stretchable media. High-density communication between the dielets is achieved with various direct-bonding or hybrid bonding techniques that achieve high conductor count and very fine pitch on flexible substrates. An example process uses high-density interconnects direct-bonded or hybrid bonded between standard interfaces of dielets to create a flexible microelectronics package. In another example, a process uses high-density interconnections direct-bonded between native interconnects of the dielets to create the flexible microelectronics packages, without the standard interfaces.
Claims
exact text as granted — not AI-modified1 .- 20 . (canceled)
21 . A microelectronics device, comprising:
a flexible substrate; conductive lines disposed on the flexible substrate; dielets; and metal to metal direct-bonds physically coupling and electrically coupling the dielets to the conductive lines without an intermediate via such that the dielets are electrically coupled together via the conductive lines.
22 . The microelectronics device of claim 21 , wherein the metal to metal direct-bonds have a pitch of approximately 5 microns or less.
23 . The microelectronics device of claim 21 , wherein the flexible substrate is stretchable or twistable.
24 . The microelectronics device of claim 21 , wherein the conductive lines have a pitch of approximately 5 microns or less.
25 . The microelectronics device of claim 21 , wherein the conductive lines have a pitch of approximately 3 microns or less.
26 . The microelectronics device of claim 21 , wherein the dielets have footprint dimensions in a range of approximately 0.25×0.25 millimeters to approximately 5.0×5.0 millimeters.
27 . The microelectronics device of claim 21 , wherein the metal to metal direct bonds have a pitch of approximately 5 microns or less.
28 . The microelectronics device of claim 21 , wherein the metal to metal direct bonds have a pitch of approximately 3 microns or less.
29 . The microelectronics device of claim 21 , wherein the dielets are coupled to the conductive lines through standard I/O interfaces onboard the dielets.
30 . The microelectronics device of claim 21 , wherein a material of the flexible substrate is selected from the group consisting of polyethylene terephthalate (PET), heat stabilized PET, polyetheretherketone (PEEK), polyethylene napthalate (PEN), heat stabilized PEN, polycarbonate (PC), polyethersulphone (PES), polyarylate (PAR), polycyclic olefin (PCO), polynorbonene (PNB), and polyimide (PI).
31 . A microelectronics device, comprising:
a substrate comprising a polymer; an oxide layer disposed on to the substrate; conductive lines disposed on the substrate; dielets; direct-bonds physically coupling the dielets to the oxide layer or the substrate; and metal to metal direct bonds electrically coupling the dielets to the conductive lines without an intermediate via such that the dielets are electrically coupled together via the conductive lines.
32 . The microelectronics device of claim 31 , wherein the substrate comprises a plastic.
33 . The microelectronics device of claim 31 , wherein a pitch of the conductive lines is approximately 5 microns or less.
34 . The microelectronics device of claim 31 , wherein a pitch of the conductive lines is approximately 3 microns or less.
35 . The microelectronics device of claim 31 , wherein a pitch of the direct-bonds is approximately 5 microns or less.
36 . The microelectronics device of claim 31 , wherein a pitch of the direct-bonds is approximately 3 microns or less.
37 . The microelectronics device of claim 31 , wherein the substrate is stretchable or twistable and the conductive lines comprise a stretchable and twistable routing layer.
38 . The microelectronics device of claim 31 , wherein the conductive lines and the direct-bonds are at a pitch of approximately 5 microns.
39 . The microelectronics device of claim 31 , wherein the dielets have footprint dimensions in a range of approximately 0.25×0.25 millimeters to approximately 5.0×5.0 millimeters.
40 . The microelectronics device of claim 31 , wherein the conductive lines and the direct-bonds are at a pitch of less than 3 microns.
41 . The microelectronics device of claim 31 , wherein the dielets are coupled to the conductive lines through standard I/O interfaces onboard the dielets.
42 . The microelectronics device of claim 31 , wherein the polymer of the substrate is selected from the group consisting of polyethylene terephthalate (PET), heat stabilized PET, polyetheretherketone (PEEK), polyethylene napthalate (PEN), heat stabilized PEN, polycarbonate (PC), polyethersulphone (PES), polyarylate (PAR), polycyclic olefin (PCO), polynorbonene (PNB), and polyimide (PI).Join the waitlist — get patent alerts
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