System and method for holistic application development and deployment in a distributed heterogeneous computing environment
Abstract
Exemplary embodiments of the invention can include a method for identifying an individual component from among a plurality of components in a target system as an identified component of a plurality of identified components, mapping each one of the identified components to respective ones of a target hardware node, generating intermediate code for each respective one of the target hardware nodes, generating serialization code for each respective communication interface between the target hardware nodes, transmitting the respective intermediate codes to each one of the target hardware nodes, and transmitting respective serialization codes to each communication interface of the target hardware nodes.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method, the method comprising:
identifying, by a processing system comprising a processor, an individual component from among a plurality of components in a target system as an identified component of a plurality of identified components; mapping, by the processing system, each one of the identified components to respective ones of a target hardware node; generating, by the processing system, intermediate code for each respective one of the target hardware nodes; generating, by the processing system, serialization code for each respective communication interface between the target hardware nodes; transmitting, by the processing system, the respective intermediate codes to each one of the target hardware nodes; and transmitting, by the processing system, respective serialization codes to each communication interface of the target hardware nodes.
2 . The method of claim 1 , wherein the identifying comprises identifying message-passing boundaries between code paths in the target system.
3 . The method of claim 1 , wherein the identifying comprises identifying data dependencies between code paths in the target system.
4 . The method of claim 1 , wherein the generating the intermediate code comprises accessing a library to generate specialized code for the respective target hardware nodes.
5 . The method of claim 4 , wherein the library comprises a generic library, an architecture-optimized library, and a part-specific library.
6 . The method of claim 1 , wherein the generating the serialization code comprises:
detecting a message type being provided between the respective communication interface; and determining a serialization strategy for the message type according to security requirements for the respective communication interface and a channel configuration of the respective communication interface.
7 . The method of claim 1 , wherein the method further comprises transforming the respective intermediate codes into a format of the respective target hardware node.
8 . A computer program product comprising a non-transitory computer readable storage medium having instructions encoded thereon that, when executed by a processor, cause the processor to:
consume an application specification associated with a plurality of devices provided in a network environment as a consumed application specification; identify independent components in the network by identifying message-passing boundaries between code paths as identified independent components; map the consumed application specification to the identified independent components by leveraging one or more code libraries; encode one more objects of the consumed application specification for a target communication channel by detecting message types that may traverse each channel from one target node to another; and transform the consumed application specification into a format suitable for a target node.
9 . The computer program of claim 8 , wherein the encoding of the one of more objects further comprises encoding the consumed application specification according to a determined security need for the communication channel.
10 . The computer program of claim 8 , wherein the code library comprises one of a generic library, an architecture-optimized library, and a part-specific library.
11 . A system, comprising:
a processing system including a processor; and a memory, coupled to the processing system, that stores executable instructions and that, when executed by the processing system, facilitate performance of operations, comprising:
identifying an individual component from among a plurality of components in a target system as an identified component of a plurality of identified components;
mapping each one of the identified components to respective ones of a target hardware node;
generating serialization code for each respective communication interface between the target hardware nodes; and
transmitting, by the processing system, respective serialization codes to each communication interface of the target hardware nodes.
12 . The system of claim 11 , wherein the identifying comprises identifying message-passing boundaries between code paths in the target system.
13 . The system of claim 11 , wherein the identifying comprises identifying data dependencies between code paths in the target system.
14 . The system of claim 11 , wherein the generating the serialization code comprises detecting a message type being provided between the respective communication interface.
15 . The system of claim 14 , wherein the generating the serialization code further comprises determining a serialization strategy for the message type according to security requirements for the respective communication interface and a channel configuration of the respective communication interface.
16 . The system of claim 11 , wherein the operations further comprise generating intermediate code for each respective one of the target hardware nodes.
17 . The system of claim 16 , wherein the operations further comprise transforming the respective intermediate codes into a format of the respective target hardware node.
18 . The system of claim 16 , wherein the operations further comprise transmitting the respective intermediate codes to each one of the target hardware nodes.
19 . The system of claim 16 , wherein the generating the intermediate code comprises accessing a library to generate specialized code for the respective target hardware nodes.
20 . The system of claim 19 , wherein the library comprises a generic library, an architecture-optimized library, and a part-specific library.Join the waitlist — get patent alerts
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