Apparatus and method for improving input/output throughput of memory system
Abstract
This technology relates to a method and apparatus for improving I/O throughput through an interleaving operation for multiple memory dies of a memory system. A memory system may include: multiple memory dies suitable for outputting data of different sizes in response to a read request; and a controller in communication with the multiple memory dies through multiple channels, and suitable for: performing a correlation operation on the read request so that the multiple memory dies interleave and output target data corresponding to the read request through the multiple channels, determining a pending credit using a result of the correlation operation, and reading, from the multiple memory dies, the target data corresponding to the read request and additional data stored in a same storage unit as the target data, based on a type of the target data corresponding to the read request and the pending credit.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A memory system comprising:
a memory device including plural dies, each having plural pages, each having plural sections; and a controller electrically coupled to the dies through plural channels respectively and suitable for providing the dies with read commands requesting data to be read from sections of different offsets within the respective dies, and controlling the dies to read the requested data according to a full sync interleaving scheme, wherein the controller controls each of the dies to perform a read operation in units of the sections or in units of the pages according to a type of a corresponding read command among the provided read commands.Join the waitlist — get patent alerts
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