Isolating electric paths in semiconductor device packages

Abstract

Methods, systems, and apparatus for reducing power consumption or signal distortions in a semiconductor device package. The semiconductor device package includes a semiconductor device, a first electric path, a second electric path, and an isolation element in the first electric path. The second electric path is electrically connected to the first electric path and a functional unit of the device. The isolation element separates an isolated portion in the first electric path from the second electric path, where the isolation element is configured to reduce current in the isolated portion when a signal is passing through the second electric path.

1 . (canceled) 
     
     
         2 . A method comprising:
 receiving a signal at a first package pin of a semiconductor device comprising a first functional unit and a second functional unit, the first package pin providing an external connection for the semiconductor device;   transmitting the signal along a first electric path connecting the first functional unit to the first package pin, the first electric path comprising a switch, wherein a configuration of the switch is controlled by a control signal;   when the switch is in a first configuration, electrically separating the first package pin from the first functional unit;   when the switch is in a second configuration, electrically coupling the first package pin to the first functional unit via the first electric path; and   transmitting the signal along a second electric path connecting the second functional unit to the first package pin, wherein the signal can pass from the first package pin through the second electric path to the second functional unit regardless of the configuration of the switch in the first electric path.   
     
     
         3 . The method of  claim 2 , wherein, in the first configuration, the switch reduces distortions caused by a portion of the first electric path between the switch and the first functional unit in signals passing through the second electric path. 
     
     
         4 . The method of  claim 2 , wherein the switch comprises at least one of a transistor, an inverter, or a repeater. 
     
     
         5 . The method of  claim 2 , wherein the first functional unit comprises an application specific integrated circuit, and the second functional unit comprises a memory. 
     
     
         6 . The method of  claim 5 , wherein the memory comprises dynamic random access memory. 
     
     
         7 . The method of  claim 2 , wherein the second functional unit comprises a test logic, and the second electric path connects the test logic to the first package pin. 
     
     
         8 . The method of  claim 2 , wherein the semiconductor device is implemented in a single semiconductor chip, and the device package further comprises:
 a chip carrier to hold the single semiconductor chip.   
     
     
         9 . The method of  claim 2 , wherein the first functional unit is implemented in a first semiconductor chip, and wherein the second functional unit is implemented in a second semiconductor chip. 
     
     
         10 . The method of  claim 9 , wherein the first semiconductor chip is held by a first chip carrier, and wherein the second semiconductor chip is held by a second chip carrier. 
     
     
         11 . The method of  claim 10 , wherein the switch and the first and second chip carriers are held by a printed circuit board. 
     
     
         12 . A method comprising:
 receiving a signal at a first package pin of a semiconductor device comprising an application specific integrated circuit and test logic, the first package pin providing an external connection for the semiconductor device;   transmitting the signal along a first electric path connecting the application specific integrated circuit to the first package pin, the first electric path comprising a switch, wherein a configuration of the switch is controlled by a control signal;   when the switch is in a first configuration, electrically separating the first package pin from the application specific integrated circuit;   when the switch is in a second configuration, electrically coupling the first package pin to the application specific integrated circuit via the first electric path; and   transmitting the signal along a second electric path connecting the test logic to the first package pin, wherein the signal can pass from the first package pin through the second electric path to the test logic regardless of the configuration of the switch in the first electric path.   
     
     
         13 . The method of  claim 12 , wherein, in the first configuration, the switch reduces distortions caused by a portion of the first electric path between the switch and the application specific integrated circuit in signals passing through the second electric path. 
     
     
         14 . The method of  claim 12 , wherein the switch comprises at least one of a transistor, an inverter, or a repeater. 
     
     
         15 . The method of  claim 12 , wherein the memory comprises dynamic random access memory. 
     
     
         16 . The method of  claim 12 , wherein the semiconductor device is implemented in a single semiconductor chip, and the device package further comprises:
 a chip carrier to hold the single semiconductor chip.   
     
     
         17 . The method of  claim 12 , wherein the application specific integrated circuit is implemented in a first semiconductor chip, and wherein the test logic is implemented in a second semiconductor chip. 
     
     
         18 . The method of  claim 17 , wherein the first semiconductor chip is held by a first chip carrier, and wherein the second semiconductor chip is held by a second chip carrier. 
     
     
         19 . The method of  claim 18 , wherein the switch and the first and second chip carriers are held by a printed circuit board. 
     
     
         20 . A method comprising:
 receiving a signal at a first package pin of a semiconductor device comprising a first functional unit and a second functional unit, the first package pin providing an external connection for the semiconductor device;   transmitting the signal along a first electric path connecting the first functional unit to the first package pin, the first electric path comprising an isolation element;   when the isolation element is in a first configuration, electrically separating the first package pin from the first functional unit;   when the isolation element is in a second configuration, electrically coupling the first package pin to the first functional unit via the first electric path; and   transmitting the signal along a second electric path connecting the second functional unit to the first package pin, wherein the signal can pass from the first package pin through the second electric path to the second functional unit regardless of the configuration of the isolation element in the first electric path.   
     
     
         21 . The method of  claim 20 , wherein, in the first configuration, the isolation element reduces distortions caused by a portion of the first electric path between the switch and the first functional unit in signals passing through the second electric path.