Interposer and manufacturing method thereof

Abstract

A manufacturing method of an interposer for disposing a semiconductor chip and an external terminal at two opposing sides includes the following steps. An active device is bonded to a first redistribution structure, wherein an active surface of the active device is in electrical contact with the first redistribution structure. A dielectric layer is formed on the first redistribution structure to encapsulate the active device. A second redistribution structure is formed over the dielectric layer to be electrically coupled to the first redistribution structure, wherein the first conductive pattern of the first redistribution structure is formed according to a first design rule to be finer than a second conductive pattern of the second redistribution structure formed according to a second design rule, the semiconductor chip and the external terminal are configured to be respectively disposed on the first conductive pattern and the second conductive pattern.

What is claimed is: 
     
         1 . A manufacturing method of an interposer for disposing a semiconductor chip and an external terminal at two opposing sides, comprising:
 bonding an active device to a first redistribution structure, wherein an active surface of the active device is in electrical contact with the first redistribution structure;   forming a dielectric layer on the first redistribution structure to encapsulate the active device; and   forming a second redistribution structure over the dielectric layer to be electrically coupled to the first redistribution structure, wherein the first conductive pattern of the first redistribution structure is formed according to a first design rule to be finer than a second conductive pattern of the second redistribution structure formed according to a second design rule, the semiconductor chip and the external terminal are configured to be respectively disposed on the first conductive pattern and the second conductive pattern.   
     
     
         2 . The manufacturing method of  claim 1 , wherein the second redistribution structure is formed by a build-up process. 
     
     
         3 . The manufacturing method of  claim 1 , further comprising:
 removing a portion of the dielectric layer aside the active device to form a through hole exposing at least a portion of the first conductive pattern of the first redistribution structure, and   forming a conductive material in the through hole to be in contact with the first conductive pattern of the first redistribution structure.   
     
     
         4 . The manufacturing method of  claim 3 , wherein the through hole is tapered towards the first redistribution structure, the conductive material is formed inside the through hole and on a top surface of the dielectric layer, and then the conductive material on the top surface of the dielectric layer is patterned to form the second conductive pattern of the second redistribution structure. 
     
     
         5 . The manufacturing method of  claim 3 , wherein the conductive material is formed inside the through hole to form a conductive through via, and then a third redistribution structure is formed on the conductive through via and the dielectric layer and a third conductive pattern of the third redistribution structure is formed according to the first design rule. 
     
     
         6 . The manufacturing method of  claim 5 , wherein the active device is provided with a through semiconductor via formed therein, and a conductive connector is formed on a rear surface of the active device to connect the through semiconductor via. 
     
     
         7 . The manufacturing method of  claim 6 , wherein before forming the third redistribution structure, a planarization process is performed on the conductive through via and the conductive connector. 
     
     
         8 . The manufacturing method of  claim 1 , wherein the active device is bonded to the first conductive pattern of the first redistribution structure using a flip-chip process. 
     
     
         9 . The manufacturing method of  claim 1 , wherein the active device is bonded to the first conductive pattern of the first redistribution structure using a direct copper-to-copper bonding process. 
     
     
         10 . The manufacturing method of  claim 1 , further comprising:
 forming the first redistribution structure on a temporary carrier; and   de-bonding the temporary carrier after forming the second redistribution structure to expose the first conductive pattern, and then bonding the semiconductor chip to a bond pad of the first conductive pattern of the first redistribution structure.