Accessing a dynamic memory module
Abstract
A method for accessing a dynamic memory module, the method may include (i) receiving, by a memory controller, a set of access requests for accessing the dynamic memory module; (ii) converting the access requests to a set of commands, wherein the set of commands comprise (a) a first sub-set of commands that are related to a first group of memory banks, and (b) a second sub-set of commands that are related to a second group of memory banks; (iii) scheduling, by a scheduler of the memory controller, an execution of the first sub-set; (iv) scheduling an execution of the second sub-set to be interleaved with the execution of the first sub-set; and (v) executing the set of commands according to the schedule.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for accessing a dynamic memory module, the method comprises:
receiving, by a memory controller, a set of access requests for accessing the dynamic memory module; converting the access requests to a set of commands, wherein the set of commands comprise (a) a first sub-set of first management commands that are related to a first group of memory banks, and (b) a second sub-set of second management commands that are related to a second group of memory banks, wherein the first and second management commands are selected out of a refresh command, a pre-charge command, and an activate command; scheduling a schedule, by a scheduler of the memory controller, an execution of the first sub-set of first management commands, wherein the scheduling is executed by the scheduler without reading, during the scheduling, the second sub-set of second management commands; scheduling, in the schedule, an execution of the second sub-set of second management commands to be interleaved with the execution of the first sub-set of first management commands; and executing the set of commands according to the schedule.
2 . The method according to claim 1 , wherein the first and second groups of memory banks belong to multiple memory banks of the dynamic memory module; and wherein the method comprises imposing, by the dynamic memory module, a time gap between consecutive input output accesses to a same group of memory banks.
3 . The method according to claim 1 , comprising scheduling the execution of the second sub-set of second management commands by an entity that differs from the scheduler.
4 . The method according to claim 3 , wherein scheduling the execution of the second sub-set of second management commands comprises converting, by a converter that differs from the scheduler, a first management command scheduled to be executed to a pair of management commands, wherein the pair of management commands comprises the first management command and a corresponding second management command.
5 . The method according to claim 1 , wherein the scheduling of the execution of the second sub-set of second management commands comprises adding, to each scheduler decision about a timing of execution of a first command of the first sub-set of first management commands, another decision regarding a timing of an execution of a second command of the second sub-set of second management commands, so that the execution of the second command immediately follows the execution of the first command.
6 . The method according to claim 1 , comprising storing, in a compressed form, at least one pair of management commands that comprises a first management command and a second management command that share an opcode, wherein for each pair of the at least one pair that is stored in the compressed form, the second management command is represented by an indicator that indicates that the second management command is a duplicate of the first management command.
7 . The method according to claim 6 , wherein the indicator is a flag.
8 . The method according to claim 1 , wherein the set of commands comprises at least one pair, and wherein the at least one pair comprises only pairs of management commands that share a pre-charge opcode or a refresh opcode.
9 . A non-transitory computer program product that stores instructions that once executed by a memory controller may cause the memory controller to execute the steps of:
receiving a set of access requests for accessing a dynamic memory module; converting the access requests to a set of commands, wherein the set of commands comprises (a) a first sub-set of first management commands that are related to a first group of memory banks, and (b) a second sub-set of second management commands that are related to a second group of memory banks, wherein the first and second management commands are selected out of a refresh command, a pre-charge command, and an activate command; scheduling a schedule, by a scheduler of the memory controller, an execution of the first sub-set of first management commands, wherein the scheduling is executed by the scheduler without reading, during the scheduling, the second sub-set of second management commands; scheduling, in the schedule, an execution of the second sub-set of second management commands to be interleaved with the execution of the first sub-set of first management commands; and executing the set of commands according to the schedule.
10 . A device that comprises a memory controller;
wherein the memory controller is constructed and arranged to:
receive a set of access requests for accessing a dynamic memory module; and
convert the access requests to a set of commands, wherein the set of commands comprise (a) a first sub-set of first management commands that are related to a first group of memory banks, and (b) a second sub-set of second management commands that are related to a second group of memory banks, wherein the first and second management commands are selected out of a refresh command, a pre-charge command, and an activate command;
wherein a scheduler of the memory controller is constructed and arranged to:
schedule, in a schedule, an execution of the first sub-set of first management commands without reading, during the scheduling, the second sub-set of second management commands; and
schedule, in the schedule, an execution of the second sub-set of second management commands to be interleaved with the execution of the first sub-set of first management commands; and
wherein the memory controller is constructed and arranged to execute the set of commands according to the schedule.
11 . The device according to claim 10 , wherein the first and second groups of memory banks belong to multiple memory banks of the dynamic memory module; and wherein the dynamic memory module is constructed and arranged to impose a time gap between consecutive input output accesses to a same group of memory banks.
12 . The device according to claim 10 , wherein the memory controller comprises an entity that differs from the scheduler, wherein the entity is constructed and arranged to schedule an execution of the second sub-set of second management commands.
13 . The device according to claim 10 , wherein the memory controller comprises a command converter that is constructed and arranged to schedule an execution of the second sub-set of second management commands by converting a first management command scheduled to be executed to a pair of management commands, wherein the pair of management commands comprises the first management command and a corresponding second management command.
14 . The device according to claim 10 , wherein the scheduler of the memory controller is constructed and arranged to schedule the execution of the second sub-set of second management commands by adding, to each scheduler decision about a timing of execution of a first command of the first sub-set of first management commands, another decision regarding a timing of an execution of a second command of the second sub-set of second management commands, so that the execution of the second command immediately follows the execution of the first command.
15 . The device according to claim 10 , wherein the scheduler of the memory controller is constructed and arranged to schedule the execution of the first sub-set of first management commands by grouping together access requests that are associated with a same row of a memory bank of the first group of memory bank.
16 . The device according to claim 10 , wherein the memory controller comprises a command converter that is constructed and arranged to schedule an execution of the second sub-set of second management commands.
17 . The device according to claim 10 , wherein the memory controller is constructed and arranged to store, in a compressed form, at least one pair of management commands that comprises a first management command and a second management command that share an opcode, wherein for each pair of the at least one pair that is stored in the compressed form, the second management command is represented by an indicator that indicates that the second management command is a duplicate of the first management command.
18 . The device according to claim 17 , wherein the indicator is a flag.Join the waitlist — get patent alerts
Track US2022253221A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.