Display device

Abstract

A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.

1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a protective circuit including a first oxide semiconductor layer, a second oxide semiconductor layer, a third oxide semiconductor layer, a fourth oxide semiconductor layer, a first conductive layer, a second conductive layer, and a third conductive layer,   wherein the first oxide semiconductor layer includes a channel formation region of a first transistor, the second oxide semiconductor layer includes a channel formation region of a second transistor, the third oxide semiconductor layer includes a channel formation region of a third transistor, and the fourth oxide semiconductor layer includes a channel formation region of a fourth transistor,   wherein the first conductive layer is configured to be one of source and drain electrode of the first transistor, and one of source and drain electrode of the second transistor,   wherein the second conductive layer is configured to be the other of the source and the drain electrode of the first transistor, and one of source and drain electrode of the third transistor,   wherein the third conductive layer is configured to be the other of the source and the drain electrode of the third transistor, and one of source and drain electrode of the fourth transistor,   wherein the one of the source and the drain electrode of the first transistor is electrically connected to a gate electrode of the first transistor,   wherein the other of the source and the drain electrode of the second transistor is electrically connected to a gate electrode of the second transistor,   wherein the other of the source and the drain electrode of the third transistor is electrically connected to a gate electrode of the third transistor,   wherein the other of the source and the drain electrode of the fourth transistor is electrically connected to a gate electrode of the fourth transistor, and   wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, the third oxide semiconductor layer, and the fourth oxide semiconductor layer includes indium, gallium, and zinc.   
     
     
         3 . The semiconductor device according to  claim 2 , further comprising a pixel including a light-emitting element,
 wherein the pixel is electrically connected to the protective circuit.   
     
     
         4 . A semiconductor device comprising:
 a protective circuit including a first oxide semiconductor layer, a second oxide semiconductor layer, a third oxide semiconductor layer, a fourth oxide semiconductor layer, a first conductive layer, a second conductive layer, and a third conductive layer,   wherein the first oxide semiconductor layer includes a channel formation region of a first transistor, the second oxide semiconductor layer includes a channel formation region of a second transistor, the third oxide semiconductor layer includes a channel formation region of a third transistor, and the fourth oxide semiconductor layer includes a channel formation region of a fourth transistor,   wherein the first conductive layer is configured to be one of source and drain electrode of the first transistor, and one of source and drain electrode of the second transistor, and is electrically connected to a gate electrode of the first transistor,   wherein the second conductive layer is configured to be the other of the source and the drain electrode of the first transistor, and one of source and drain electrode of the third transistor,   wherein the third conductive layer is configured to be the other of the source and the drain electrode of the third transistor, and one of source and drain electrode of the fourth transistor, and is electrically connected to a gate electrode of the third transistor,   wherein the other of the source and the drain electrode of the second transistor is electrically connected to a gate electrode of the second transistor,   wherein the other of the source and the drain electrode of the fourth transistor is electrically connected to a gate electrode of the fourth transistor, and   wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, the third oxide semiconductor layer, and the fourth oxide semiconductor layer includes indium, gallium, and zinc.   
     
     
         5 . The semiconductor device according to  claim 4 , further comprising a pixel including a light-emitting element,
 wherein the pixel is electrically connected to the protective circuit.