US2022208796A1PendingUtilityA1

Transistor and method for manufacturing the same

Assignee: SEMICONDUCTOR ENERGY LABPriority: Apr 8, 2016Filed: Mar 17, 2022Published: Jun 30, 2022
Est. expiryApr 8, 2036(~9.7 yrs left)· nominal 20-yr term from priority
H10D 99/00H10D 86/425H10D 64/693H10D 64/62H10D 62/80H10D 30/6757H10D 30/6755H10D 30/6734H10D 30/6723H10D 86/423H10D 86/60H01L 27/1229H01L 29/78696H01L 29/7869H01L 29/78648H01L 29/45H01L 29/78633H01L 27/3262H01L 29/24H01L 27/1225H01L 29/66969H01L 29/518H10K 59/1213
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Claims

Abstract

An object is to provide a highly reliable transistor. In a bottom-gate transistor including an oxide semiconductor layer as a semiconductor layer where a channel is formed, an insulating layer containing excess oxygen is formed over the oxide semiconductor layer, and then an insulating layer through which impurities do not easily pass is formed without exposure to the air. As the insulating layer through which impurities do not easily pass, an aluminum oxide layer or the like can be used. When a conductive layer with a function of absorbing hydrogen is used for a source electrode and a drain electrode, the amount of hydrogen in the oxide semiconductor layer can be reduced.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for manufacturing a transistor, comprising:
 forming a first electrode;   forming a first insulating layer covering the first electrode;   forming a second insulating layer over the first insulating layer;   forming a third insulating layer over the second insulating layer;   forming a first oxide semiconductor layer over the third insulating layer;   forming a second oxide semiconductor layer over the first oxide semiconductor layer;   processing the first oxide semiconductor layer and the second oxide semiconductor layer into an island shape;   forming a second electrode overlapping a first region of the second oxide semiconductor layer, and a third electrode overlapping a second region of the second oxide semiconductor layer;   forming a fourth insulating layer covering the second oxide semiconductor layer;   performing heat treatment; and   forming a fifth insulating layer over the fourth insulating layer,   wherein the step of performing the heat treatment and the step of forming the fifth insulating layer are performed without exposure to air.   
     
     
         2 . The method for manufacturing a transistor, according to  claim 1 , wherein the heat treatment is performed at a temperature higher than or equal to 200° C. and lower than or equal to 500° C. 
     
     
         3 . The method for manufacturing a transistor, according to  claim 1 , wherein the heat treatment comprises a step performed in an atmosphere containing nitrogen or a rare gas. 
     
     
         4 . The method for manufacturing a transistor, according to  claim 1 , wherein the heat treatment comprises a step performed in an atmosphere containing an oxidizing gas. 
     
     
         5 . The method for manufacturing a transistor, according to  claim 1 , wherein the first insulating layer comprises silicon and nitrogen. 
     
     
         6 . The method for manufacturing a transistor, according to  claim 1 , wherein the second insulating layer comprises aluminum and oxygen. 
     
     
         7 . The method for manufacturing a transistor, according to  claim 1 , wherein the third insulating layer comprises silicon and oxygen. 
     
     
         8 . The method for manufacturing a transistor, according to  claim 1 , wherein the third insulating layer comprises excess oxygen. 
     
     
         9 . The method for manufacturing a transistor, according to  claim 1 , wherein the fourth insulating layer comprises excess oxygen. 
     
     
         10 . The method for manufacturing a transistor, according to  claim 1 , wherein the fifth insulating layer comprises aluminum and oxygen.

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