Latency-aware prefetch buffer

Abstract

An apparatus configured to provide latency-aware prefetching, and related systems, methods, and computer-readable media, are disclosed. The apparatus comprises a prefetch buffer comprising at least a first entry, and the first entry comprises a memory operation prefetch request portion storing a first previous memory operation prefetch request. The apparatus further comprises a prefetch buffer replacement circuit, which is configured to select an entry of the prefetch buffer storing a previous memory operation prefetch request for replacement with a subsequent memory operation prefetch request, and to replace the previous memory operation prefetch request in the selected entry with the subsequent memory operation prefetch request.

What is claimed is: 
     
         1 . An apparatus, comprising:
 a prefetch buffer comprising a plurality of entries, each comprising a memory operation prefetch request portion configured to store a previous memory operation prefetch request, and   a prefetch buffer replacement circuit;   the prefetch buffer replacement circuit configured to select one of the plurality of entries of the prefetch buffer storing a previous memory operation prefetch request for replacement with a subsequent memory operation prefetch request, and to replace the previous memory operation prefetch request in the selected one of the plurality of entries with the subsequent memory operation prefetch request based on a replacement policy comprising one of a “last-in, first-out” (LIFO), ping-pong, round robin, random, and duplicate address coalescing policy.   
     
     
         2 . (canceled) 
     
     
         3 . (canceled) 
     
     
         4 . The apparatus of  claim 1 , wherein the prefetch buffer comprises a circular buffer. 
     
     
         5 . The apparatus of  claim 1 , wherein the prefetch buffer is configured to select an entry of the prefetch buffer storing a previous memory operation prefetch request to be provided as a prefetch fill request based on a selection policy, and to generate a prefetch fill request based on the previous memory operation prefetch request stored in the selected entry. 
     
     
         6 . The apparatus of  claim 5 , wherein
 the prefetch buffer replacement circuit is configured to select the entry of the prefetch buffer storing the previous memory operation prefetch request for replacement with the subsequent memory operation prefetch request based on a replacement policy; and   the selection policy and the replacement policy are based on the same algorithm.   
     
     
         7 . The apparatus of  claim 5 , wherein the prefetch buffer is further configured to provide the prefetch fill request to a memory system. 
     
     
         8 . The apparatus of  claim 1 , further comprising a prefetch request generation unit configured to generate memory operation prefetch requests, comprising the first previous memory operation prefetch request and the subsequent memory operation prefetch request. 
     
     
         9 . The apparatus of  claim 8 , wherein the prefetch request generation unit is further configured to generate a plurality of memory operation prefetch requests based on a stride value. 
     
     
         10 . The apparatus of  claim 9 , wherein the prefetch request generation unit is further configured to generate the plurality of memory operation prefetch requests based on a stride value by generating a first memory operation prefetch request based on the stride value and a second memory operation prefetch request based on an integer multiple of the stride value. 
     
     
         11 . The apparatus of  claim 1  integrated into an integrated circuit (IC). 
     
     
         12 . The apparatus of  claim 10  further integrated into a device selected from the group consisting of: a server, a computer, a portable computer, a desktop computer, a mobile computing device, a set top box, an entertainment unit, a navigation device, a communications device, a fixed location data unit, a mobile location data unit, a global positioning system (GPS) device, a mobile phone, a cellular phone, a smart phone, a session initiation protocol (SIP) phone, a tablet, a phablet, a wearable computing device (e.g., a smart watch, a health or fitness tracker, eyewear, etc.), a personal digital assistant (PDA), a monitor, a computer monitor, a television, a tuner, a radio, a satellite radio, a music player, a digital music player, a portable music player, a digital video player, a video player, a digital video disc (DVD) player, a portable digital video player, an automobile, a vehicle component, avionics systems, a drone, and a multicopter. 
     
     
         13 . An apparatus, comprising:
 means for storing prefetch entries having a plurality of entries each comprising a memory operation prefetch request portion storing a previous memory operation prefetch request, and   means for selecting a prefetch entry for replacement;   the means for selecting a prefetch entry for replacement configured select one of the plurality of entries of the means for storing prefetch entries storing a previous memory operation prefetch request for replacement with a subsequent memory operation prefetch request, and to replace the previous memory operation prefetch request in the selected one of the plurality of entries with the subsequent memory operation prefetch request based on a replacement policy comprising one of a “last-in, first-out” (LIFO), ping-pong, round robin, random, and duplicate address coalescing policy.   
     
     
         14 . (canceled) 
     
     
         15 . A method, comprising:
 receiving a first prefetch request;   determining one of a plurality of entries of a prefetch buffer in which a previous memory operation prefetch request is to be replaced by the first prefetch request by a prefetch buffer replacement circuit based on a replacement policy comprising one of a “last-in, first-out” (LIFO), ping-pong, round robin, random, and duplicate address coalescing policy; and   writing the first prefetch request into the determined one of the plurality of entries of the prefetch buffer.   
     
     
         16 . (canceled) 
     
     
         17 . (canceled) 
     
     
         18 . The method of  claim 15 , further comprising selecting an entry of the prefetch buffer storing a memory operation prefetch request to be provided as a prefetch fill request based on a selection policy, the selection policy and the replacement policy based on the same algorithm. 
     
     
         19 . A non-transitory computer-readable medium having stored thereon computer executable instructions which, when executed by a processor, cause the processor to:
 receive a first prefetch request;   determine one of a plurality of entries of a prefetch buffer in which a previous memory operation prefetch request is to be replaced by the first prefetch request by a prefetch buffer replacement circuit based on a replacement policy comprising one of a “last-in, first-out” (LIFO), ping-pong, round robin, random, and duplicate address coalescing policy; and   write the first prefetch request into the determined one of the plurality of entries of the prefetch buffer.   
     
     
         20 . The non-transitory computer-readable medium of  claim 19 , wherein:
 a first entry of the plurality of entries of the prefetch buffer comprises a second prefetch request replaced with the first prefetch request;   the prefetch buffer comprises a second entry of the plurality of entries containing a third prefetch request, and   the computer executable instructions which, when executed by the processor further cause the processor to determine to replace the first entry instead of the second entry based on the replacement policy.   
     
     
         21 . The apparatus of  claim 1 , wherein each entry of the plurality of entries further comprises an indication of an expiration time of the first previous memory operation prefetch request in the memory operation prefetch request portion. 
     
     
         22 . The apparatus of  claim 1 , further comprising a prefetch request generation circuit configured to:
 receive hit and miss address information from a cache memory;   determine a stride comprising a distance between memory load addresses; and   generate a new memory operation prefetch request based on the received hit and miss address information and a multiple of the stride.