US2022197788A1PendingUtilityA1

Data storage device with spare blocks for replacing bad block in super block and operating method thereof

Assignee: SK HYNIX INCPriority: Oct 31, 2018Filed: Mar 14, 2022Published: Jun 23, 2022
Est. expiryOct 31, 2038(~12.3 yrs left)· nominal 20-yr term from priority
Inventors:Jeen Park
G06F 2212/7203G06F 11/1048G06F 11/2094G06F 11/1658G06F 12/0246G06F 3/0658G06F 3/061G11C 29/886G06F 3/064G06F 3/0647G06F 13/1668G06F 3/0656G11C 29/42G06F 12/0607G06F 3/0688G06F 3/0629G06F 11/1012G06F 11/073
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Claims

Abstract

A data storage device includes a memory device and a controller. The memory device includes a plurality of planes, wherein each of the planes includes two or more memory blocks. The controller is configured to control an operation of the memory device. The controller is further configured to generate a first super block as a super block including two or more way-interleavable memory blocks among the plurality of memory blocks of the plurality of planes, determine whether each of the memory blocks included in the first super block is a bad block, retrieve a spare block for replacing a first memory block determined as a bad block, in the plurality of planes; and generate a second replacing super block as a super block in which the first memory block is replaced with a second memory block positioned in a plane which does not have the first memory block, when all spare blocks of a plane including the first memory block are used.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A data storage device comprising:
 a memory device including a plurality of planes, each of the planes including a plurality of memory blocks; and   a controller configured to control an operation of the memory device,   wherein the controller is further configured to:   generate a first super block including two or more memory blocks among the plurality of memory blocks, the two or more memory blocks being included in different planes, respectively;   determine whether there is a bad block among the two or more memory blocks;   generate a second super block including other memory blocks excluding the bad block among the two or more memory blocks, when it is determined that there is the bad block;   determine whether there is an available spare block in a plane where the bad block is located after generating the second super block; and   generate a third super block including the available spare block and the other memory blocks, when it is determined that there is the available spare block in the plane.   
     
     
         2 . The data storage device according to  claim 1 , wherein the controller generates the second super block by replacing the bad block with a first spare block included in one of planes other than the plane, when it is determined that there is the bad block and no available spare block in the plane. 
     
     
         3 . The data storage device according to  claim 2 , wherein the controller generates the third super block by re-replacing the first spare block in the second super block with the available spare block, when it is determined that there is the available spare block in the plane after generating the second super block. 
     
     
         4 . The data storage device according to  claim 1 , wherein the controller determines that a memory block in which a write operation fail occurs, among the two or more memory blocks, is the bad block. 
     
     
         5 . The data storage device according to  claim 1 , wherein the memory device comprises a first spare memory block group and a second spare memory block group, each of which includes two or more spare blocks included in the memory device. 
     
     
         6 . The data storage device according to  claim 5 , wherein, when all spare blocks of the first spare memory block group are used, spare blocks included in the second spare memory block group become available. 
     
     
         7 . An operating method of a data storage device which includes a memory device including a plurality of planes, each of the planes including a plurality of memory blocks, the operating method comprising:
 generating a first super block including two or more memory blocks among the plurality of memory blocks, the two or more memory blocks being included in different planes, respectively;   determining whether there is a bad block among the two or more memory blocks;   generating a second super block including other memory blocks excluding the bad block among the two or more memory blocks, when it is determined that there is the bad block;   determining whether there is an available spare block in a plane where the bad block is located after generating the second super block; and   generating a third super block including the available spare block and the other memory blocks, when it is determined that there is the available spare block in the plane.   
     
     
         8 . The operating method according to  claim 7 , wherein the generating the second super block comprises replacing the bad block with a first spare block included in one of planes other than the plane, when it is determined that there is the bad block and no available spare block in the plane. 
     
     
         9 . The operating method according to  claim 8 , wherein the generating the third super block comprises re-replacing the first spare block in the second super block with the available spare block, when it is determined that there is the available spare block in the plane after generating the second super block. 
     
     
         10 . The operating method according to  claim 7 , wherein the determining whether there is the bad block comprises determining whether a memory block in which a write operation fail occurs, among the two or more memory blocks, is the bad block. 
     
     
         11 . The operating method according to  claim 7 ,
 wherein the memory device comprises a first spare memory block group and a second spare memory block group, each of which includes two or more spare blocks included in the memory device.   
     
     
         12 . The operating method according to  claim 11 , wherein, when all spare blocks of the first spare memory block group are used, spare blocks included in the second spare memory block group become available.

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