Technologies for application-specific network acceleration with unified coherency domain

Abstract

Technologies for application-specific network acceleration include a computing device including a processor and an accelerator device such as a field-programmable gate array (FPGA). The processor and the accelerator device are coupled via a coherent interconnect and may be included in a multi-chip package. The computing device binds a virtual machine executed by the processor with an application function unit of the accelerator device via the coherent interconnect. The computing device processes network application data with the virtual machine and the application function unit within a coherency domain maintained with the coherent interconnect. Processing the network data may include processing a packet of a network flow by the virtual machine and processing subsequent packets of the network flow by the application function unit. Other embodiments are described and claimed.

1 . A computing device for network data processing, the computing device comprising:
 a processor;   an accelerator device;   a coherent interconnect, wherein the processor and the accelerator device are coupled via the coherent interconnect; and   a network application to (i) bind a virtual machine executed by the processor with an application function unit of the accelerator device via the coherent interconnect and (ii) process network application data with the virtual machine and the application function unit within a coherency domain maintained with the coherent interconnect in response to binding of the virtual machine with the application function unit.   
     
     
         2 . The computing device of  claim 1 , wherein to process the network application data comprises to:
 process, by the virtual machine, a first packet of a network flow; and   process, by the application function unit, a second packet of the network flow in response to processing the first packet.   
     
     
         3 . The computing device of  claim 1 , wherein to process the network application data comprises to communicate the network application data between the processor and the accelerator device via the coherent interconnect. 
     
     
         4 . The computing device of  claim 1 , wherein the accelerator device comprises an application-specific integrated circuit. 
     
     
         5 . The computing device of  claim 1 , wherein the accelerator device comprises a field programmable gate array. 
     
     
         6 . The computing device of  claim 5 , wherein:
 the network application is further to program the field-programmable gate array with the application function unit; and   to bind the virtual machine with the application function unit comprises to bind the virtual machine with the application function unit in response to programming of the field-programmable gate array.   
     
     
         7 . The computing device of  claim 5 , wherein the computing device comprises a multi-chip package, wherein the multi-chip package comprises the processor and the field-programmable gate array. 
     
     
         8 . The computing device of  claim 5 , wherein:
 the network application is further to (i) provision the virtual machine and (ii) request a virtual channel between the virtual machine and the application function unit in response to provisioning of the virtual machine; and   to bind the virtual machine with the application function unit comprises to bind the virtual machine with the application function unit in response to a request of the virtual channel.   
     
     
         9 . The computing device of  claim 8 , wherein to request the virtual channel comprises to request a coherent virtual channel. 
     
     
         10 . The computing device of  claim 8 , wherein:
 to request the virtual channel comprises to request a virtual channel with an application hint; and   to bind the virtual machine with the application function unit comprises to select the coherent interconnect based on the application hint.   
     
     
         11 . The computing device of  claim 8 , wherein to process the network application data with the virtual machine and the application function unit comprises to:
 access, by the application function unit, the network application data via a load/store interface port of the field programmable gate array; and   communicate, by the load/store interface port of the field programmable gate array, with the processor via the coherent interconnect in response to an access of the network application data.   
     
     
         12 . The computing device of  claim 8 , wherein:
 to request the virtual channel comprises to request a coherent virtual channel or a non-coherent virtual channel; and   to bind the virtual machine with the application function unit comprises to bind the virtual machine with the application function unit via the coherent interconnect in response to a request of a coherent virtual channel and to bind the virtual machine with the application function unit via a non-coherent interconnect in response to a request of a non-coherent virtual channel.   
     
     
         13 . A method for network data processing, the method comprising:
 binding, by a computing device, a virtual machine executed by a processor of the computing device with an application function unit of an accelerator device of the computing device via a coherent interconnect; and   processing, by the computing device, network application data with the virtual machine and the application function unit within a coherency domain maintained with the coherent interconnect in response to binding the virtual machine with the application function unit.   
     
     
         14 . The method of  claim 13 , wherein processing the network application data comprises:
 processing, by the virtual machine, a first packet of a network flow; and   processing, by the application function unit, a second packet of the network flow in response to processing the first packet.   
     
     
         15 . The method of  claim 13 , wherein processing the network application data comprises communicating the network application data between the processor and the accelerator device via the coherent interconnect. 
     
     
         16 . The method of  claim 13 , wherein the accelerator device comprises a field programmable gate array. 
     
     
         17 . The method of  claim 16 , further comprising:
 provisioning, by the computing device, the virtual machine; and   requesting, by the computing device, a virtual channel between the virtual machine and the application function unit in response to provisioning the virtual machine;   wherein binding the virtual machine with the application function unit comprises binding the virtual machine with the application function unit in response to requesting the virtual channel.   
     
     
         18 . The method of  claim 17 , wherein:
 requesting the virtual channel comprises requesting a virtual channel with an application hint; and   binding the virtual machine with the application function unit comprises selecting the coherent interconnect based on the application hint.   
     
     
         19 . One or more computer-readable storage media comprising a plurality of instructions that, in response to being executed, cause a computing device to:
 bind a virtual machine executed by a processor of the computing device with an application function unit of an accelerator device of the computing device via a coherent interconnect; and   process network application data with the virtual machine and the application function unit within a coherency domain maintained with the coherent interconnect in response to binding the virtual machine with the application function unit.   
     
     
         20 . The one or more computer-readable storage media of  claim 19 , wherein to process the network application data comprises to:
 process, by the virtual machine, a first packet of a network flow; and   process, by the application function unit, a second packet of the network flow in response to processing the first packet.